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# Principal Digital Verification Engineer - ASIC / UVM in Rochester

- **Company:** Energy Jobline
- **Location:** Rochester, NY, United States
- **Contract:** Permanent contract
- **Skills:** JIRA, C++ (Programming Language), Software Debugging, Formal Verification, Python (Programming Language), SystemVerilog, Application Specific Integrated Circuits, Git
- **Published:** October 30, 2026
- **Apply:** https://www.energyjobline.com/job/principal-digital-verification-engineer-asic-uvm-rochester-32113398

## About the Role

* 12+ years of digital verification experience using SystemVerilog, UVM, SVA, and major vendor simulators.
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 * Proven ability to define and execute comprehensive digital verification and coverage strategies.
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 * Strong debugging skills with a methodical approach to complex technical problems.
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 * Experience with formal verification methods advantageous.
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 * Familiarity with DSP and/or Forward Error Correction (FEC) technologies a plus.
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 * Experience with Python, C/C++, Git, and Jira desirable.
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