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# Hardware Design Engineer

- **Company:** Semidynamics
- **Location:** Barcelona, Spain (Remote available)
- **Contract:** Permanent contract
- **Skills:** Artificial Intelligence, Altium Designer, Data Centers, Electronic Design Automation, Firmware, Hardware Design, OrCAD, PCI Express, Schematic Capture, Scripting
- **Published:** October 7, 2026
- **Apply:** https://www.indeed.com/viewjob?jk=5d95e3471af002bf

## About the Role

* 5+ years designing complex digital boards - server, datacentre, networking, or comparable high-speed systems
 * Proven ownership of schematic capture on multi-layer boards carrying high-speed interfaces, from concept to production
 * Strong grasp of digital and mixed-signal design: power trees, sequencing, clocking, reset, level shifting, interface standards
 * Comfortable with an EDA suite - Cadence Allegro/OrCAD, Altium, Mentor Xpedition or equivalent
 * Able to define layout constraints and review layout critically, not just hand it off
 * Experience carrying a design through multiple revisions and ECOs on the back of test and field feedback

Nice to Have:

 * Boards carrying PCIe Gen5/Gen6, DDR5/LPDDR, or high-speed SerDes interfaces
 * High-current power delivery design and PDN-aware layout work
 * NPI experience with CM or ODM partners, including DFM, DFT and yield feedback
 * Familiarity with OCP rack-scale platforms and their board form factors
 * Python scripting for BOM handling, netlist checks and design automation

## Description

What you will work on:

 * Schematic design and ownership of boards for an AI accelerator platform
 * Component selection and sourcing trade-offs, from silicon to passives
 * Layout direction and constraint definition, working alongside PCB designers
 * Design reviews, DFx and the path from prototype through to production
 * Respins and ECOs driven by test, bring-up and field feedback

Responsibilities:

 * Schematic capture & ownership: Own the full schematic for assigned boards - architecture, block partitioning, interface definition, power tree and sequencing. Maintain the design through revisions, ECOs and respins.
 * Component selection: Select and specify components against electrical, thermal, cost, lifecycle and supply constraints. Own the BOM, including second sourcing and obsolescence risk.
 * Layout direction: Define stackup, placement intent, routing constraints and keep-outs. Review layout against SI, PI, power and thermal requirements, and drive the iterations to closure.
 * Design verification: Run circuit-level simulation where it matters, build and check timing and interface budgets, and perform worst-case analysis on critical nets and rails.
 * Cross-functional & lifecycle: Work with SI/PI, power, thermal, mechanical and firmware teams to fold their requirements into the design. Drive formal design reviews, hand the board off cleanly to the bring-up team with the documentation they need, and take it through NPI with manufacturing partners.