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Agent guide: [/agents.md](https://www.wearedevelopers.com/agents.md). --- # User Terminal Senior Modem Engineer - OneWeb Next - **Company:** Eutelsat - **Location:** Issy-les-Moulineaux, France - **Experience:** Expert - **Contract:** Permanent contract - **Skills:** Abstraction Layers, Profiling, Protocol Stack, Modems, Continuous Integration, Data Transmissions, Software Debugging, Linux on Embedded Systems, Firmware, Joint Test Action (IEEE Standards), Python (Programming Language), Multiprocessing, Open Source Technology, Real-Time Operating Systems, Reduced Instruction Set Computing, Signal Processing, Toolchain, Data Logging, Computer Network Technologies, Build Management, Information Technology, Bare Metal, Software Defined Radio, Software Version Control, GNSS - **Published:** October 27, 2026 - **Apply:** https://www.indeed.com/viewjob?jk=b60f61b046bc4fb6 ## About the Role * Engineering degree or MSc in electronics, telecommunications, signal processing or computer science; * 6 to 12 years in embedded signal processing, wireless physical layer implementation, modem integration or software defined radio; * Strong C and C++ on embedded targets, whether bare metal, RTOS or embedded Linux, with real experience of profiling and optimisation, ideally including vector intrinsics; * Practical experience of fixed point implementation: scaling, saturation, dynamic range and the effect of quantisation on measured performance; * Working knowledge of digital communications: acquisition and synchronisation, channel estimation and equalisation, demapping and forward error correction, sufficient to know what a kernel computes and what a bad measurement is telling you; * Solid laboratory practice with vector signal generators and analysers, spectrum analysers, oscilloscopes and logic analysers, and comfort with RF measurement hygiene: calibration, de-embedding, cabling and levels; * Python or equivalent for instrument automation, post-processing of capture files and comparison against reference models; * Demonstrated ability to debug hard, intermittent problems across the hardware and software boundary, and the stubbornness to reach root cause rather than a workaround; * Version control, continuous integration and structured release practice; * Comfortable working in a capability being built: little existing tooling to inherit, close daily work with a senior architect, and the autonomy to turn an open question into an experiment; * Assets * Experience with satellite terminals, satellite modems or ground segment equipment; * Experience with multi-core RISC-V subsystems, vector DSP engines and micro-kernel firmware, including toolchains, interrupt controllers, DMA engines and inter-processor communication; * Exposure to 3GPP non-terrestrial network features, or to DVB-S2X and DVB-RCS2 waveforms; * Experience with JESD204 converter interfaces, clocking and SYSREF distribution, and with GHz-class data converters; * Experience with timing and synchronisation test: PTP and the G.8275 profiles, G.8273.2 clock classes, 1PPS, GNSS simulation and holdover measurement; * Experience with channel emulation, Doppler profile generation and over-the-air test setups; * Software defined radio platforms and open source signal processing frameworks; * Experience of accepting or qualifying software developed by another organisation. ## Description * Bring the platform up: toolchains and build environments, boot and firmware images, RISC-V subsystem initialisation, converter, clocking and peripheral configuration, and first signal through the transmit and receive chains; * Work inside the PHY software: build, modify, port and optimise signal processing micro-kernels, their scheduling across signal units, and the glue code and hardware abstraction layers around the FEC and signal processing engines; * Build and own the laboratory bench: RF chain, vector signal generators and analysers, channel emulator, GNSS simulator, timing test set, and the switching and calibration around them; * Automate everything that will be run more than twice: scripted instrument control, unattended campaigns, nightly regression on target, a results store and the reporting that goes with it; * Execute the acceptance and characterisation campaigns defined with the architect: BER and BLER against Es/N0, acquisition time distributions, Doppler ramp and phase noise sensitivity, handover interruption time, EVM, ACLR and spectral mask, throughput and latency, and timing performance against max|TE|, MTIE, TDEV and holdover masks; * Verify delivered software bit-exactly against the reference model and its golden vectors, quantify and explain every departure, and keep the regression suite aligned as the platform evolves; * Instrument and profile the target: IQ capture at several points of the chain, logging and tracing, exception handling, performance counters, cycles per sample and per slot, DMA and memory bandwidth occupancy, and interrupt latency; * Debug across the whole stack, from a firmware exception or a DMA stall to an RF symptom on the analyser: JTAG, trace, logic analyser, capture replay, and bisection through firmware and configuration; * Reproduce independently the results claimed by our partners, and reproduce the issues they report, so that every technical discussion rests on evidence produced on our own bench; * Support integration of the modem with the RF front end, the antenna subsystem, the protocol stack and the host processor, and contribute to end to end terminal testing including over the air; * Investigate issues arising in qualification and early field deployment, and drive them to root cause and to a documented fix; * Document the setups, the procedures and the results to a standard that lets another Eutelsat engineer reproduce them without you, and feed that material into the team's growing knowledge base.