> Markdown version of [/jobs/ext/4181863-senior-design-engineer](https://www.wearedevelopers.com/jobs/ext/4181863-senior-design-engineer). Every page supports `.md` or `Accept: text/markdown`. Links point to the HTML versions so they work for humans too. Agent guide: [/agents.md](https://www.wearedevelopers.com/agents.md). --- # Senior Design Engineer - **Company:** GTT, LLC - **Location:** Austin, TX, United States - **Experience:** Expert - **Salary:** $218,400.0 - $245,440.0 - **Contract:** Temporary contract - **Skills:** Computer Programming, Computer Engineering, Electronic Design Automation, Perl (Programming Language), Firmware, Formal Verification, Field-Programmable Gate Array (FPGA), Hardware Description Language, Python (Programming Language), Object-Oriented Software Development, Static Timing Analysis, SystemVerilog, Tcl (Programming Language), Verilog, VHSIC Hardware Description Language (VHDL), Scripting, Application Specific Integrated Circuits, Linux Development, Physical Design, Software Defined Radio - **Published:** October 7, 2026 - **Apply:** https://www.indeed.com/viewjob?jk=15854dd4ddbe7c8c ## About the Role * Work Authorization: Applicants must be authorized to work for ANY employer in the U.S. We are unable to sponsor or take over sponsorship of an employment Visa at this time., * 7+ years of experience in ASIC design and implementation * Experience with FPGA & ASIC design * Experience with Linux development environment * Experience with design verification and test bench development Nice-to-Have Experience * Experience in full ASIC/FPGA lifecycle (architecture, design, simulation, verification, validation, integration & test) * Experience with Software-Defined Radio Architectures, ADC/DAC, and/or DSPs * Experience with physical design flows and industry-standard EDA tools * Experience with RTL2GDSII physical design and signoff flows * Experience with DFT/Scan/MBIST/LBIST methodologies * Experience mentoring junior engineers Required Skills * Proficiency in HDL programming (VHDL, Verilog, and/or SystemVerilog) Preferred Skills * Advanced degree (MS/PhD) in Electrical Engineering, Computer Engineering, or related field * Knowledge of DSP and communications systems including spread spectrum, forward error correction, and modulation types (QPSK, QAM, PCM/FM, PAM) * Strong object-oriented programming and scripting skills (Python, TCL, Perl) * Knowledge of deep sub-micron FinFET and CMOS technologies Education Requirements * Bachelor's degree in Electrical Engineering, Computer Engineering, or related technical discipline (required) * Advanced degree (MS/PhD) in Electrical Engineering, Computer Engineering, or related field (preferred), * ASIC design and implementation: 7 years (Required) ## Description * Design and develop digital ASICs and FPGAs, and/or mixed-signal ASICs * Implement designs using HDL (VHDL, Verilog, and/or SystemVerilog) * Develop verification methodologies and test benches for block and system-level verification * Create and execute test plans, develop test harnesses, and implement coverage models * Conduct timing analysis, noise analysis, and other signoff checks * Collaborate with cross-functional teams including systems, firmware, architecture, and product engineering * Support lab integration and troubleshooting activities * Resolve design issues and drive solutions for timing, congestion, and other implementation challenges