> Markdown version of [/jobs/ext/4201225-cpu-performance-architect](https://www.wearedevelopers.com/jobs/ext/4201225-cpu-performance-architect). Every page supports `.md` or `Accept: text/markdown`. Links point to the HTML versions so they work for humans too. Agent guide: [/agents.md](https://www.wearedevelopers.com/agents.md). --- # CPU Performance Architect - **Company:** NVIDIA Corporation - **Location:** Santa Clara, CA, United States - **Experience:** Expert - **Salary:** $184,000 - $287,500 - **Contract:** Permanent contract - **Skills:** Computer Engineering, Software Debugging, Subsystems - **Published:** October 31, 2026 - **Apply:** https://nvidia.wd5.myworkdayjobs.com/NVIDIAExternalCareerSite/job/US-CA-Santa-Clara/CPU-Performance-Architect_JR2015944-1 ## About the Role * Deep understanding of brand new CPU microarchitecture and architecture. * Proven track record of CPU microarchitectural innovation across areas such as Front End CPU Uarch, Midcore CPU Uarch, and Memory Subsystem CPU Uarch. * Experience in performance modeling, debugging, and demonstrating the merit of innovative ideas. * Close collaboration skills with build and verification teams to successfully implement microarchitectural improvements. * At least 8 years of experience in a frontline role within brand new CPU projects. * Strong critical thinking, communication, and advocacy abilities. * Minimum educational requirement: Bachelor's degree in Electrical Engineering, Computer Engineering, or related field, or equivalent experience. Ways to stand out from the crowd: * Experience leading microarchitecture segments and driving initiatives. * History of collaboration with architects and microarchitects to achieve ambitious targets. * Demonstrated ability to think critically and advocate for complex ideas successfully. * Enthusiasm for driving innovation and leading by doing. ## Description * Modeling potential improvements to determine their merit and feasibility. * Implementing effective solutions and collaborating closely with build, verification, and post-silicon teams. * Resolving critical issues related to timing, power, and area to achieve flawless implementation. * Partnering with lead microarchitects to meet the CPU core's performance, area, and power targets. * Advocating for microarchitectural ideas, communicating their benefits and drawbacks in various mediums. * Driving the microarchitecture segment with enthusiasm and energy, leading by example.