> Markdown version of [/jobs/ext/4258112-high-bandwidth-memory-design-architect-e1-to-smts](https://www.wearedevelopers.com/jobs/ext/4258112-high-bandwidth-memory-design-architect-e1-to-smts). Every page supports `.md` or `Accept: text/markdown`. Links point to the HTML versions so they work for humans too. Agent guide: [/agents.md](https://www.wearedevelopers.com/agents.md). --- # High Bandwidth Memory Design Architect - E1 to SMTS - **Company:** Micron Technology, Inc. - **Location:** Richardson, TX, United States - **Contract:** Internship / Graduate position - **Skills:** Artificial Intelligence, Data Analysis, Computer Engineering, Dynamic Random-Access Memory, Signal Integrity, Large Language Models, Generative AI, Data Analytics - **Published:** October 31, 2026 - **Apply:** https://dejobs.org/x/x/CB98869EF0FF40F49D39B20A9436F2CE/job/ ## About the Role * Degree in Electrical Engineering, Computer Engineering, or a related field completed prior to the employment start date. * Strong foundation in at least two of the following areas: CMOS circuits, analog or mixed-signal design, semiconductor devices, computer architecture, memory systems, thermal sciences, signal integrity, power delivery, or advanced packaging. * Experience developing engineering models, simulations, or analytical methodologies job experience or university-related work. * Demonstrated ability to evaluate complex technical problems, draw evidence-based conclusions, and communicate recommendations effectively to multidisciplinary teams. * Strong analytical, problem-solving, written communication, and verbal communication skills., * Work experience, graduate research, internship, thesis, dissertation, or project experience related to HBM, DRAM, SRAM, memory controllers, high-speed interfaces, semiconductor architecture, or 3D integration technologies. * Experience with engineering simulation and analysis tools such as HSPICE, FineSim, Spectre, or similar circuit-design environments. * Understanding of power, performance, area, timing, thermal, and reliability tradeoffs in advanced semiconductor designs. * Experience using data analytics, AI, Large Language Models (LLMs), or Generative AI technologies to enhance engineering productivity, design exploration, or technical analysis. * Technical communication experience demonstrated through publications, conference presentations, patents, research reviews, or design reports. ## Description As an HBM Design Architect, you will contribute to analysis, modeling, and pathfinding for future High Bandwidth Memory products. Working with experienced architects and engineering teams, you will analyze system and block-level design tradeoffs related to performance, power, area, thermal behavior, reliability, and manufacturability. This role provides an opportunity to leverage AI, Large Language Models (LLMs), and data-driven engineering methodologies to accelerate architecture exploration and improve decision-making., * Analyze HBM and DRAM architectures using analytical models, simulations, silicon data, and AI-assisted techniques to evaluate timing, bandwidth, power, area, thermal performance, reliability, and design complexity. * Develop and apply modeling, simulation, and data-analysis methodologies to assess alternative architectural approaches, identify design sensitivities, and support technology pathfinding. * Collaborate with architecture, circuit design, layout, packaging, product, and system teams to evaluate implementation feasibility, performance tradeoffs, signal integrity, power delivery, and manufacturability considerations. * Perform root-cause analysis using simulation and measured data to improve model accuracy, validate assumptions, and provide evidence-based design recommendations. * Communicate technical findings through presentations, design reviews, architecture discussions, and written documentation, clearly articulating assumptions, risks, and recommended actions.