> Markdown version of [/jobs/ext/4258230-design-engineer-sr](https://www.wearedevelopers.com/jobs/ext/4258230-design-engineer-sr). Every page supports `.md` or `Accept: text/markdown`. Links point to the HTML versions so they work for humans too. Agent guide: [/agents.md](https://www.wearedevelopers.com/agents.md). --- # Design Engineer Sr. - **Company:** System One - **Location:** El Segundo, CA, United States - **Experience:** Expert - **Salary:** $270,400.0 - $276,640.0 - **Contract:** Temporary to permanent - **Skills:** Computer Programming, Computer Engineering, Firmware, Formal Verification, Field-Programmable Gate Array (FPGA), Hardware Description Language, Static Timing Analysis, SystemVerilog, Verilog, VHSIC Hardware Description Language (VHDL), Application Specific Integrated Circuits, Linux Development - **Published:** October 7, 2026 - **Apply:** https://dejobs.org/x/x/CCC94BDB94A0431AA57F0DDA354948FC/job/ ## About the Role Required: ANALYSIS DESIGN * 7+ years of experience in ASIC design and implementation * Bachelor's degree in Electrical Engineering, Computer Engineering, or related technical discipline * Experience with FPGA & ASIC design * Proficiency in HDL programming (VHDL, Verilog, and/or SystemVerilog) * Experience with Linux development environment * Experience with design verification and test bench development ## Description * Design and develop digital ASICs and FPGAs, and/or mixed-signal ASICs * Implement designs using HDL (VHDL, Verilog, and/or System Verilog) * Develop verification methodologies and test benches for block and system-level verification * Create and execute test plans, develop test harnesses, and implement coverage models * Conduct timing analysis, noise analysis, and other signoff checks * Collaborate with cross-functional teams including systems, firmware, architecture, and product engineering * Support lab integration and troubleshooting activities * Resolve design issues and drive solutions for timing, congestion, and other implementation challenges