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# Senior AI System Architect

- **Company:** Credo Llc
- **Location:** San Jose, CA, United States
- **Experience:** Expert
- **Salary:** $160,000.0 - $220,000.0
- **Contract:** Permanent contract
- **Skills:** Artificial Intelligence, Computer Networks, Computer Engineering, Microarchitecture, Data Infrastructure, Microprocessors, Distributed Computing Environment, Ethernet, High-Level Architecture, Network Topologies, CPU Design, PCI Express, Remote Direct Memory Access, Software Deployment, Systems Architecture, AI Infrastructure, Graphics Processing Unit (GPU), Large Language Models, Backend, Information Technology, Machine Learning Operations
- **Published:** October 12, 2026
- **Apply:** https://www.indeed.com/viewjob?jk=15371444e949a9ee

## About the Role

Bachelor's degree in Computer Engineering, EE, CS, or related field required.
Three years in XPU or AI interconnect system architecture and micro architecture working experience.
Strong foundational understanding of computer architecture, including GPU, NPU, and/or CPU design principles.
Familiarity with large language model architectures and distributed training/inference concepts (e.g., parallelism strategies, model serving) through coursework, research, or personal projects.
Demonstrated analytical ability - for example, through published research, thesis work, or quantitative project work - with a track record of independently studying and synthesizing technical material.
Strong cross-functional leadership and communication skills, daily experience working with compiler, software, SOC & backend team preferred.
Preferred Qualifications
Master's or PhD in Computer Science, Artificial Intelligence, Engineering, or a related field.
Deep, hands-on NPU hardware architecture expertise.
Real, hands-on NPU architecture background, with direct experience participating in an NPU design from architecture definition through silicon bring-up, validation, and volume production deployment.

 * Working knowledge of high-speed interconnect or networking concepts (e.g., PCIe, Ethernet, RDMA) is a plus.

## Description

Responsibilities: Model the memory and interconnection architecture linking XPUs to memory and across node, rack, and cluster boundaries - not the internal design of the NPUs/GPUs/CPUs themselves.
Solve communication and topology bottlenecks that arise from all kinds of parallelism strategies during distributed LLM training and inference.
Define how XPUs utilize the memory and interconnect fabric, ensuring workloads map cleanly onto the network topology.
Work with silicon, memory, networking, and software teams to specify interconnect fabric requirements and resolve integration issues between compute nodes.
Bring hands-on NPU hardware architecture judgment to interconnect and system design decisions, informed by direct experience taking NPU silicon from definition through bring-up, validation, and production deployment.

 * Track leading open LLM architectures to anticipate how model structure will stress interconnect and system topology.

About Credo: Credo's mission is to transform connectivity at scale through fast, reliable, and energy-efficient system solutions. Our high-speed copper and optical interconnect products deliver industry-leading power and performance at up to 1.6T to meet the ever-expanding data infrastructure demands of AI.

Our product portfolio includes ZeroFlap (ZF) Active Electrical Cables (AECs) and ZF optical transceivers, OmniConnect memory solutions, and a suite of retimers and DSPs for optical and copper Ethernet and PCIe, all leveraging the PILOT diagnostic and analytics software platform. Credo innovations enable our customers to connect the systems that connect the world.