> Markdown version of [/jobs/ext/4311719-senior-director-hardware-engineering](https://www.wearedevelopers.com/jobs/ext/4311719-senior-director-hardware-engineering). Every page supports `.md` or `Accept: text/markdown`. Links point to the HTML versions so they work for humans too. Agent guide: [/agents.md](https://www.wearedevelopers.com/agents.md).

---

# Senior Director, Hardware Engineering

- **Company:** Renesas Electronics America Inc.
- **Location:** San Jose, CA, United States
- **Experience:** Expert
- **Salary:** $275,500.0 - $344,500.0
- **Contract:** Permanent contract
- **Skills:** Artificial Intelligence, Data Analysis, Architectural Patterns, Cloud Computing, Computer Engineering, Logic Synthesis of Circuits, Formal Verification, Integrated Development Environments, Machine Learning, Modular Design, Requirements Traceability, Software Engineering, Subsystems, SystemC, System on a Chip, System Testing, SystemVerilog, Large Language Models, Generative AI, Information Technology
- **Published:** October 22, 2026
- **Apply:** https://www.indeed.com/viewjob?jk=a707246b7bea09cb

## About the Role

* Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related technical discipline.
 * Master's degree or Ph.D. preferred., * 15+ years of experience in semiconductor or SoC development.
 * 8+ years of technical leadership experience managing large engineering organizations and complex programs.
 * Proven experience leading SoC architecture, design, or verification teams.

Technical Skills

 * Strong understanding of:
 + SoC architecture and integration
 + Digital design methodologies
 + IP and subsystem development
 + Hardware/software co-design
 + SoC verification methodologies
 * Hands-on experience with:
 + SystemC/TLM model development
 + SystemVerilog and UVM-based verification environments
 + Virtual platforms and executable specifications
 + SoC performance modeling
 + Design and verification automation flows
 * Experience creating organization-wide engineering methodologies and design frameworks.

AI & Automation

 * Demonstrated experience applying AI/ML technologies to semiconductor design workflows.
 * Understanding of Generative AI and LLM-based engineering productivity solutions.
 * Capability to define and scale AI-driven model development methodologies across multiple teams., * Experience leading disruptive methodologies and influencing mindset changes
 * Experience with heterogeneous compute architectures, AI accelerators, MCUs, MPUs, or automotive SoCs.
 * Knowledge of cloud-based EDA infrastructure and advanced design automation technologies.
 * Track record of driving transformational improvements in engineering productivity and quality.
 * Strong executive communication and stakeholder management skills.

Leadership Competencies

 * Strategic thinker with strong execution focus.
 * Ability to influence across organizational boundaries.
 * Strong mentoring and talent-development skills.
 * Data-driven decision maker.
 * Passion for innovation and continuous improvement.
 * Proven ability to lead large-scale engineering transformation initiatives.

## Description

The ideal candidate is a recognized technical leader with deep expertise in SoC architecture, system modeling, RTL development, and engineering process transformation. They will partner with product groups, platform teams, and executive leadership to define and deploy next-generation design methodologies that accelerate innovation and enable reuse across the organization., Technical Leadership

 * Define and drive the strategic roadmap for SoC design methodologies across the company.
 * Lead architecture reviews and technical direction for complex SoC and subsystem developments.
 * Establish best practices for hardware/software co-design and model-based development.
 * Provide technical leadership for cross-functional teams spanning architecture, design, verification, emulation, and software.

System Modeling & Virtual Platforms

 * Lead development of transaction-level and architectural models using SystemC/TLM.
 * Define methodologies for building executable SoC specifications and virtual platforms.
 * Drive alignment between SystemC models, RTL implementations, and software development environments.
 * Enable early software development and system validation using virtual prototypes.

Design & Verification Methodology

 * Develop and standardize SoC modeling and verification flows using SystemVerilog, UVM, and related methodologies.
 * Promote reusable IP, subsystem, and SoC-level modeling frameworks.
 * Drive methodology adoption across product groups to improve predictability, quality, and reuse.
 * Establish metrics and KPIs to measure design productivity and model accuracy.

AI-Driven Engineering Innovation

 * Define and implement AI-enabled methodologies for model generation, verification, and validation.
 * Evaluate and deploy Generative AI, LLMs, and automation technologies to improve engineering efficiency.
 * Create workflows that leverage AI for:
 + SystemC model generation
 + SystemVerilog model development
 + Verification content generation
 + Coverage analysis
 + Design documentation
 + Requirement traceability
 * Lead pilot programs and organization-wide adoption of AI-assisted design methodologies.

Organizational Leadership

 * Build and lead high-performing engineering teams.
 * Mentor directors, principal engineers, and distinguished engineers.
 * Foster collaboration across Central Engineering, Product Groups, and external partners.
 * Influence long-term semiconductor technology and platform strategy.