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# Sr Design Engineer

- **Company:** Micron Technology, Inc.
- **Location:** San Jose, CA, United States
- **Experience:** Expert
- **Salary:** $120,000.0 - $252,000.0
- **Contract:** Permanent contract
- **Skills:** Artificial Intelligence, Software Documentation, System Configuration, Software Debugging, Linux, Electronic Design Automation, Python (Programming Language), Regression Analysis, Verilog, Linux Virtual Server, Scripting, Digital Access Carrier System
- **Published:** October 27, 2026
- **Apply:** https://www.indeed.com/viewjob?jk=4e085cd3f962064e

## About the Role

* MS/PhD or equivalent experience preferred, BS in electrical engineering required. 2+ years of NAND design relevant proven experience required.
 * A high level of self-motivation.
 * Proficiency in analog/mixed signal circuit design (charge pumps, op amps, DACs, ADCs, linear regulators, oscillators, bandgaps)
 * Good fundamentals in semiconductor and device physics and analog/mixed-signal circuit design. An understanding of semiconductor reliability issues including CHC, NBTI, stress, and snapback, as well as Electromigration (EM) and IR analysis.
 * Strong circuit debugging and problem-solving skills.
 * Experience of circuit verification and optimization, layout planning, parasitic extractions of the circuits, experience guiding layout.
 * Employing Artificial Intelligence for the best task efficiency
 * Excellent teamwork attitude. Good verbal communication skills (English) and ability to convey sophisticated technical concepts in verbal and written form., * Knowledge of analog and digital simulators such as HSPICE, Fast SPICE, and Verilog
 * Familiarity with Cadence design, LVS/DRC tools (a plus).
 * Experience with a scripting language.
 * Familiarity with Linux/UNIX

## Description

* Design, simulate, optimize, and floor-plan NAND circuit blocks.
 * Evaluate design feasibility and analyze circuit functionality across use cases.
 * Implement analog and mixed-signal circuit designs that meet performance and reliability specifications.
 * Validate design performance at block- and chip-level using industry-standard simulation tools.
 * Collaborate with multi-functional teams to analyze and reduce NAND power consumption.
 * Build and maintain Python-based AI utilities that collaborate with EDA tools to accelerate development workflows (e.g., environment setup, corner execution, regressions, automated documentation, predictive build/layout).
 * Review existing user documentation and generate new build collateral.
 * Collaborate with groups such as Product Engineering, Test, Probe, Process Integration, Assembly, and Marketing to ensure optimized manufacturability, cost, reliability, and time-to-market.