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Agent guide: [/agents.md](https://www.wearedevelopers.com/agents.md). --- # FPGA Design & Firmware Engineer, Staff - **Company:** Qualcomm - **Location:** San Diego, CA, United States (Remote available) - **Experience:** Expert - **Salary:** $145,600.0 - $218,400.0 - **Contract:** Permanent contract - **Skills:** Computer-Aided Design, Agile Methodology, Artificial Intelligence, Systems Engineering, JIRA, Boolean Algebra, C++ (Programming Language), Collaborative Software, Computer Programming, Computer Engineering, Data Centers, Software Debugging, Software Design Patterns, Linux, Digital Electronics, Logic Synthesis of Circuits, Linux on Embedded Systems, Embedded Software, Emulators, Ethernet, Firmware, Field-Programmable Gate Array (FPGA), Hardware Description Language, Hardware Design, Python (Programming Language), Linux-Powered Devices, Machine Learning, PCI Express, Software Architecture, Systems Architecture, SystemVerilog, Systems Integration, Verilog, Vivado, Application Specific Integrated Circuits, Fpga Hardware, Git, Information Technology, Vlsi Design - **Published:** October 6, 2026 - **Apply:** https://www.indeed.com/viewjob?jk=5b34abbb1d1bb139 ## About the Role * Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related technical field. * 5+ years of professional experience in FPGA design, FPGA firmware, RTL development, or related digital hardware development. * Strong hands-on experience with SystemVerilog/Verilog and RTL/HDL design. * Experience with modern FPGA platforms such as AMD/Xilinx UltraScale+, MPSoC, Versal, Intel Stratix, or Agilex. * Experience with FPGA development tools such as AMD Vivado or Intel Quartus. * Strong analytical, debugging, and problem-solving skills. * Excellent interpersonal and communication skills, with the ability to work independently and collaborate effectively across hardware and software teams., * Master's or PhD in Electrical Engineering, Computer Engineering, Computer Science, Applied Mathematics, or a related technical field. * Experience with clock-domain crossing (CDC), high-speed designs, clock/reset architecture, FPGA implementation, and timing closure techniques. * Hands-on experience with FPGA MGT/SerDes transceivers and LVDS interfaces, including integration, bring-up, and debug. * Strong understanding of digital logic, computer architecture, and VLSI design concepts. * Hands-on programming experience with C++ and Python. * Experience implementing and debugging interfaces and protocols such as AXI, PCIe, Ethernet, I2C, MGT, and LVDS. * Experience designing, integrating, bringing up, and debugging large-scale, rack-based multi-FPGA systems, including system-level architecture and inter-FPGA connectivity. * Experience or strong interest in applying AI/ML technologies to hardware design, verification, EDA/CAD flows, and engineering automation. * Experience with Linux and Embedded Linux. * Experience with modern hardware-description languages or RTL-generation frameworks, such as SpinalHDL, Amaranth, RustHDL, Spade, or similar technologies. * Understanding of ARM-based systems, Linux device drivers, and embedded system architecture. * Understanding of software architecture, design principles, development practices, and design patterns. * Experience with Git, Jira, CI/automation, and collaborative software/firmware development workflows. * Knowledge of Agile development principles and practices. Keywords FPGA, FPGA Firmware, RTL, SystemVerilog, Verilog, AI, ML, SpinalHDL, Rust, AMD, Xilinx, Intel, Altera, Vivado, Quartus, UltraScale+, MPSoC, Versal, Stratix, Agilex, Multi-FPGA, Rack-Scale Systems, MGT, SerDes, LVDS, PCIe, AXI, Ethernet, CDC, Timing Closure, Clocking, Reset, Embedded Systems, Embedded Linux, ARM, C++, Python, Digital Design, CAD, EDA, Emulation, Prototyping, IoT, Mobile, Compute, Data Center, * Bachelor's degree in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience., Master's degree in Science, Engineering, or related field and 3+ years of ASIC design, verification, validation, integration, or related work experience. OR PhD in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience. ## Description Join the Qualcomm Global CAD team developing advanced FPGA-based emulation and prototyping solutions supporting next-generation IoT, mobile, compute, and data center platforms. We are seeking an experienced Senior FPGA Design / FPGA Firmware Engineer with strong hands-on experience in RTL design, FPGA implementation, system integration, and embedded software. This is a hands-on individual contributor role with significant influence on FPGA system architecture, HW/SW partitioning, firmware design, and long-term technology direction. Responsibilities * Design, implement, integrate, and debug FPGA RTL and firmware for custom emulation and prototyping platforms. * Develop FPGA solutions using industry-standard AMD/Xilinx and Intel FPGA technologies and toolchains. * Contribute to system architecture, HW/SW partitioning, FPGA architecture, implementation strategy, and system integration. * Work on large and complex FPGA designs involving clock/reset architecture, clock-domain crossings, high-speed interfaces, and timing closure. * Design and integrate high-speed FPGA interfaces, including PCIe, MGT/SerDes and LVDS-based connectivity. * Develop and integrate embedded software and firmware supporting FPGA-based systems. * Contribute to the continuous development and improvement of FPGA tools, technologies, methodologies, automation, and design flows. * Explore and apply AI/ML techniques to FPGA design, verification, debug, and development flows, improving engineering productivity, design quality, and automation. * Collaborate across hardware, software, CAD, and system engineering teams to debug and resolve complex system-level problems.