> Markdown version of [/jobs/ext/4335531-sr-principal-fpga-digital-design-engineer](https://www.wearedevelopers.com/jobs/ext/4335531-sr-principal-fpga-digital-design-engineer). Every page supports `.md` or `Accept: text/markdown`. Links point to the HTML versions so they work for humans too. Agent guide: [/agents.md](https://www.wearedevelopers.com/agents.md). --- # Sr. Principal FPGA Digital Design Engineer - **Company:** BAE Systems - **Location:** Nashua, NH, United States - **Experience:** Expert - **Salary:** $132,962.0 - $226,035.0 - **Contract:** Permanent contract - **Skills:** C (Programming Language), Systems Engineering, C++ (Programming Language), Configuration Management, Static Program Analysis, Computer Programming, Continuous Delivery, Continuous Integration, Software Debugging, Linux, Logic Synthesis of Circuits, Perl (Programming Language), Firmware, Field-Programmable Gate Array (FPGA), Internet Protocol, Python (Programming Language), MATLAB, PCI Express, Requirements Management, Serial Communications, Server Administration, Software Engineering, Verification and Validation (Software), Static Timing Analysis, Systems Architecture, System on a Chip, SystemVerilog, Systems Integration, Tcl (Programming Language), Verilog, VHSIC Hardware Description Language (VHDL), Vivado, Scripting, ModelSim, Gitlab, Git, Linux Development, Physical Design, Software Version Control, Hardware Debugging, Programming Languages - **Published:** October 2, 2026 - **Apply:** https://www.careerbuilder.com/job-details/fpga-design-engineer-senior-principal-nashua-nh--47f5edda-b70b-4360-9036-d8fe961e64d8 ## About the Role * BS degree in Electrical Engineering or related Science, Technology, Engineering and Mathematics (STEM) major obtained by start date. * 8+ years VHDL/Verilog expertise. * Expertise in developing advanced concepts and innovative technical solutions. * Expertise in clock domain crossing, timing analysis, revision control. * Experience in hardware-software integration and validation. * Familiarity with Xilinx, Intel, Microchip or Lattice devices and tool flows. * Familiarity with the Linux environment and commands. * Knowledge of C programming and scripting languages such as Perl, Tcl and Python. * Demonstrated effective communication, collaboration, and presentation skills * Must be a U.S. Citizen; must be able to obtain/maintain a DoD Secret clearance Preferred Education, Experience, & Skills * Advance knowledge of Digital Signal Processing * Experience with architecture design in Matlab/Simulink. * Experience with platforms as Vivado and Modelsim/QuestaSim. * Experience with UVM/SystemVerilog, hardware debug. * Experience with High-speed interfaces (PCIe). * Proficiency in a Linux development environment. * Proficiency using Git and CI/CD workflows. * Knowledge of software programming languages such as C/ C++. * Experience with Xilinx/AMD and MicroSemi/Microchip part families, internal FPGA fabric, and IP. * Previous experience related to aerospace design techniques. * Active DoD Secret or Top Secret clearance., Aerospace and Defense, Architectural Design, Auto Insurance, Budgeting, C Programming Language, C++ Programming Language, CMVC (Configuration Management Version Control), Centers for Disease Control and Prevention (CDC), Communication Skills, Computer Firmware, Continuous Deployment/Delivery, Continuous Integration, Customer Support/Service, Digital Signal Processing (DSP), DoD Secret Clearance, Documentation, Electrical Engineering, Electronics, Embedded Processors, FPGA, FPGA Design, Git, Graphic Design, Hardware Debugging, Hardware-Software Integration, IP (Internet Protocol), Insurance, Intel Product Family, Legal, Linux Operating System, MATLAB, Mathematics, Mentoring, ModelSim, PCI Express (PCI-E), Perl Programming Language, Place and Route, Presentation/Verbal Skills, Programming Languages, Proposal Development, Python Programming/Scripting Language, Radio Frequency, Requirements Management, Scripting (Scripting Languages), Serial Link Circuits, Simulation, Software Administration, Software Engineering, Software Validation, Source Code/Configuration Management (SCM), Static Analysis, Static Timing Tools, SystemVerilog, Systems Engineering, Tcl-Tk, Team Player, Technical Leadership, Technical/Engineering Design, Test Bench, Timing Verification, United States Citizen, VHDL Hardware Description Language, Verilog Hardware Description Language ## Description We are seeking a Sr. Principal FPGA Digital Design Engineer who brings strong technical leadership, initiative, and a drive to push the boundaries of what's possible. In this role, you will work cross-functionally with hardware, software, and systems engineering teams, taking full ownership of high-impact design challenges from concept through delivery, and contributing innovative solutions to problems many consider unsolvable. BAE Systems offers a modern, flexible work environment that supports work-life balance-including a 9-days/80-hours pay period-and a mission-focused culture where every design delivers real-world impact. Role Responsibilities * Support program proposal development by defining technical solutions, estimating effort and budget, and collaborating with systems, hardware, and software teams to align with customer requirements. * Serve as an expert in advanced digital, FPGA, and system-level design by contributing to research initiatives that develop leading-edge concepts and establish new engineering platform solutions. * Translate FPGA design requirements from system-level inputs in close collaboration with hardware, systems, and software teams to ensure seamless FPGA performance and integration. * Architect and implement FPGA designs across major device families (Xilinx, Intel, Microchip, Lattice) using VHDL, supporting applications ranging from gigabit-rate serial links and RF DSP to control loops, embedded processing, and processor-level interfaces. * Innovate with next-generation FPGA platforms (Xilinx Zynq SoC, RFSoC), use SystemVerilog, UVM, and digital-twin co-simulation methodologies. * Drive synthesis, place-and-route, static timing analysis, and overall design optimization. * Build high-quality test benches, simulation environments, and static verification setups (Lint, Autocheck, CDC, RDC). * Lead hands-on lab integration, perform daily real-time testing, and incorporate direct feedback from flight test operations and end users. * Support development workflows and participate in formal specification and design reviews. * Manage version control and configuration processes using Git/GitLab while maintaining accurate, up-to-date design documentation. * Serve as a mentor to senior and junior design engineers and help strengthen overall team technical capability. * Maintain full awareness of program schedules and budgets.