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Agent guide: [/agents.md](https://www.wearedevelopers.com/agents.md). --- # Principal Hardware Design Engineer (Data Center) - **Company:** Qualcomm - **Location:** San Diego, CA, United States (Remote available) - **Experience:** Expert - **Salary:** $192,400.0 - $288,600.0 - **Contract:** Permanent contract - **Skills:** Board Bringup, Artificial Intelligence, Analog Electronics, Computer Engineering, Data Centers, Software Debugging, Ethernet, Firmware, Hardware Design, PCI Express, Schematic Capture, Signal Integrity, Verification and Validation (Software), Systems Architecture, Systems Integration, Strategies of Testing, Hardware Testing, Information Technology, Machine Learning Operations - **Published:** October 25, 2026 - **Apply:** https://www.indeed.com/viewjob?jk=eb321dd8dbae668f ## About the Role * Bachelor or Master's Degree in Electrical Engineering, Computer Science or related field. * 15+ years experience in Hardware Engineering related work experience. This would include areas such as digital or analog circuit design, schematic capture, circuit simulation, power/signal integrity simulation tools, lab/measurement/test equipment, and technical project leadership roles. * Technical project leadership across the full hardware development lifecycle * Lab measurement and test equipment (high-bandwidth oscilloscopes, VNA/TDR, BERT, power analyzers), * Hands-on experience delivering AI/ML accelerator, GPU or high-performance compute cards or servers into data center production. * Experience with PCIe Gen5/Gen6, CXL, 112G/224G PAM4 SerDes and high-speed Ethernet (400G/800G). * Expertise in high-current power delivery (500A+ rails), 48V power architectures and VR design and validation. * Experience with HBM, LPDDR5/5X or DDR5 memory subsystem design. * Familiarity with OCP specifications (OAM, OCP NIC 3.0, DC-MHS, ORv3) and rack-scale system design., * Bachelor's degree in Engineering or related field and 8+ years of Hardware Engineering experience or related work experience., Master's degree in Engineering or related field and 7+ years of Hardware Engineering experience or related work experience. OR PhD in Engineering or related field and 6+ years of Hardware Engineering experience or related work experience. ## Description The Central Hardware Systems (CHS) HW Sys design team designs cutting-edge Hardware systems and printed circuit boards across Qualcomm's most strategic platforms - spanning DataCenter, Server, Connectivity, Compute, and R&D. As a Principal Engineer, you will be a key contributor shaping next-generation hardware from concept through fabrication, working alongside world-class electrical and mechanical engineering teams. The Principal Engineer will lead hardware embedded system development of data center platforms built on Qualcomm SoCs, from test platforms, R&D, accelerator / CPU cards to multi-card server systems and rack-level designs. These platforms serve as production products, reference designs, verification and validation systems, software and firmware development vehicles, and SoC test platforms. The systems are high-power and high-density, with very high-speed interconnects. They include high-bandwidth memory (LPDDR/HBM/DDR5), PCIe Gen5/Gen6 and CXL, high-speed Ethernet scale-out fabrics (400G/800G), 112G+ SerDes, multi-phase power delivery at very high current, advanced thermal solutions including direct liquid cooling, and board management and security subsystems. The role works closely with server ODMs and Qualcomm's SoC, software and systems teams to deliver platforms and sys designs that perform, scale and are reliable in production. * Lead hardware projects and design teams from architecture and requirements phases through design, validation, bring-up, system integration and production. * Develop and drive advanced hardware design methodologies, design rules, implementation flows, validation strategies and engineering best practices. * Lead system-level design optimization and resolution of complex electrical, optical, mechanical, compatibility, compliance, manufacturing and cost issues. * Provide technical leadership for advanced analysis including signal integrity, power integrity, feasibility, characterization and hardware validation. * Collaborate across diverse cross-functional teams including IC design, software, systems, test, Customer Engineering, manufacturing and operations to deliver high-quality production solutions. * Coordinate design handoff to ODM and provide support for ODM design and production. * Serve as a technical authority and mentor, providing design reviews, technical direction and guidance across multiple engineering teams and projects. * Drive innovation, intellectual property, process improvement and future product capabilities by applying technical expertise * Define platform architecture for performance, power, density and total cost of ownership, including memory subsystem topology, host and accelerator-to-accelerator interconnect, scale-up and scale-out networking, and power and thermal budgets. * Lead design of high-current, low-voltage power delivery networks: multi-phase VRs. Drive power integrity analysis from board through package to die. * Provide technical leadership for signal integrity on 112G/224G SerDes, PCIe Gen5/Gen6, CXL, Ethernet and high-speed memory interfaces, including channel modeling, pre- and post-layout simulation, and correlation with lab measurements. * Develop and drive advanced hardware design methods, design rules, validation strategies, DFx and RAS (reliability, availability, serviceability) practices suited to 24x7 data center deployment. * Lead hardware bring-up, characterization and debug of new AI SoCs and platforms; support SoC test and post-silicon validation; work with software and firmware teams to optimize inference workloads. * Collaborate with SoC/IC design, packaging, software, ML systems, test, Customer Engineering, product management, supply chain, manufacturing and operations to deliver high-quality production solutions. * Coordinate design handoff to server ODMs and contract manufacturers, and support ODM design, NPI and volume production. * Track industry standards (OCP, PCI-SIG, CXL Consortium, UEC/UALink, DMTF) and apply technical expertise to drive innovation, intellectual property, process improvement and future product roadmaps.