> Markdown version of [/jobs/ext/4383412-soc-integration-and-design-engineer](https://www.wearedevelopers.com/jobs/ext/4383412-soc-integration-and-design-engineer). Every page supports `.md` or `Accept: text/markdown`. Links point to the HTML versions so they work for humans too. Agent guide: [/agents.md](https://www.wearedevelopers.com/agents.md). --- # SoC Integration and Design Engineer - **Company:** Broadcom - **Location:** Saint Paul, MN, United States - **Experience:** Expert - **Salary:** $109,700.0 - $175,500.0 - **Contract:** Permanent contract - **Skills:** Artificial Intelligence, Dynamic Random-Access Memory, Formal Verification, Hardware Description Language, Broadcom, SystemVerilog, Universal Asynchronous Receiver/Transmitter, Verilog, VHSIC Hardware Description Language (VHDL), Application Specific Integrated Circuits, Data Analytics - **Published:** October 3, 2026 - **Apply:** https://www.techcareers.com/job.asp?id=3417378891&tx=JP5751FFL&pt=1&aff=0B19D771-A501-4A5E-8338-2A822B784D54&utm_source=Job%20Feed&utm_medium=textkernel&utm_campaign=DE&utm_term=0B19D771-A501-4A5E-8338-2A822B784D54 ## About the Role * Experience with SOC architecture using AMBA interconnect, multiple processors and a variety of IO interfaces from basic UART to high speed DRAM with multiple lanes of high speed SERDES * Excellent communication and cross-functional collaboration skills + usage of cloud based documentation * Ability to analyze complex trade-offs and make data-driven decisions * Demonstrated expertise in HDL languages Verilog/VHDL and SystemVerilog * Strong understanding of physical implementation and timing closure with process variation * Must have legal authorization to work in the US. This position does not have funding to support company-sponsored immigration support., * Bachelors in Engineering (EE, CE, or CS preferred) and 8+ years of related experience; OR Masters degree in Engineering and 6+ years of related experience. ## Description The ASIC Product Division in Broadcom, a leading supplier of state-of-the-art SoC and embedded IP, is looking for qualified individuals to work in SoC and IP development programs. The candidate will be joining a high performance design team responsible for state-of-the-art SoC development to meet customer requirements for AI and storage chips. This is an exciting opportunity to develop new ideas, design the next generation of leading-edge products, and work on the most advanced technologies in the industry. Responsibilities: * Participate in defining the overall SOC architecture and integrating IP * Ensure quality design through detailed design analysis using leading edge tools * Lead the extended team to support simulation, synthesis, formal verification, constraint definition, and validation of design * Collaborate with Internal and External teams to enable customer success * Refine solution by consulting with layout and DFT engineers to optimize area, performance and yield * Generate collateral to support an SoC release including design specifications