> Markdown version of [/jobs/ext/4425179-sta-engineer](https://www.wearedevelopers.com/jobs/ext/4425179-sta-engineer). Every page supports `.md` or `Accept: text/markdown`. Links point to the HTML versions so they work for humans too. Agent guide: [/agents.md](https://www.wearedevelopers.com/agents.md). --- # STA Engineer - **Company:** Amazon.com, Inc. - **Location:** San Jose, CA, United States - **Salary:** $203,673.0 - $203,674.0 - **Contract:** Permanent contract - **Skills:** Software Debugging, Static Timing Analysis, Tcl (Programming Language), Application Specific Integrated Circuits, Physical Design - **Published:** October 7, 2026 - **Apply:** https://www.careerjet.com/jobad/usb7d3dfdd9bb6c172e504b0e2f465a5db ## About the Role * Strong STA and timing-closure experience. * Hands-on experience with Synopsys PrimeTime or equivalent. * Strong knowledge of SDC. * Strong understanding of setup/hold analysis. * Experience with MCMM. * Strong knowledge of timing constraints. * Tcl scripting experience. * Understanding of synthesis and physical-design flows. ## Description We are looking for experienced STA Engineers responsible for timing analysis, timing closure, and sign-off of complex ASIC/SoC designs. The ideal candidate will have strong hands-on experience in Static Timing Analysis, timing constraints, MCMM analysis, and timing closure, along with a solid understanding of synthesis and physical-design flows. Key Responsibilities * Perform Static Timing Analysis (STA) for complex designs. * Analyze setup, hold, recovery, and removal violations. * Develop and validate timing constraints. * Perform MCMM timing analysis. * Debug timing violations and drive timing closure. * Analyze clock definitions, generated clocks, and timing exceptions. * Work closely with RTL, synthesis, and physical design teams. * Support ECO implementation and timing optimization. * Generate and analyze timing reports.