> Markdown version of [/jobs/ext/4449421-rtl-engineer-asic-engineer](https://www.wearedevelopers.com/jobs/ext/4449421-rtl-engineer-asic-engineer). Every page supports `.md` or `Accept: text/markdown`. Links point to the HTML versions so they work for humans too. Agent guide: [/agents.md](https://www.wearedevelopers.com/agents.md). --- # RTL Engineer/ASIC Engineer - **Company:** iTechStack, Inc. - **Location:** Dallas, TX, United States - **Contract:** Contract - **Skills:** Software Debugging, Field-Programmable Gate Array (FPGA), Static Timing Analysis, Verilog, VHSIC Hardware Description Language (VHDL), Application Specific Integrated Circuits, Pixel Perfect - **Published:** October 27, 2026 - **Apply:** https://www.dice.com/job-detail/f756e761-4f0d-4b8a-b135-e2ff447ec729 ## About the Role We are currently seeking a highly skilled RTL/ASIC Design Engineer to join our dynamic team. If you possess hands-on experience and expert-level knowledge in RTL design, SoC integration of ARM core-based designs, and a deep understanding of Verilog/VHDL, we invite you to apply. ## Description · Execute RTL design and coding with expert-level proficiency · Integrate ARM core-based designs into SoCs, ensuring seamless compatibility · Work with AMBA Bus protocols, including AXI, AHB, APB · Conduct Lint and CDC analysis for design robustness · Utilize FPGA-based designs or FPGA prototyping for development · Apply in-depth knowledge of Verilog/VHDL and ARM SoC architecture · Perform ASIC synthesis and Static Timing Analysis at an expert level · Execute equivalency checking to ensure design accuracy · Collaborate with cross-functional teams to achieve project milestones · Participate in debugging sessions, provide insights, and maintain effective communication