> Markdown version of [/jobs/ext/4484346-senior-gpu-system-architect](https://www.wearedevelopers.com/jobs/ext/4484346-senior-gpu-system-architect). Every page supports `.md` or `Accept: text/markdown`. Links point to the HTML versions so they work for humans too. Agent guide: [/agents.md](https://www.wearedevelopers.com/agents.md). --- # Senior GPU System Architect - **Company:** NVIDIA Corporation - **Location:** Santa Clara, CA, United States - **Experience:** Expert - **Salary:** $184,000.0 - $287,500.0 - **Contract:** Permanent contract - **Skills:** Artificial Intelligence, Computer Engineering, Distributed Systems, Ethernet, Network Interface Controllers, InfiniBand, Python (Programming Language), Transport Layer, PCI Express, Performance Tuning, Remote Direct Memory Access, Systems Architecture, SystemC, Graphics Processing Unit (GPU), Application Specific Integrated Circuits, Non-Uniform Memory Access - **Published:** October 31, 2026 - **Apply:** https://nvidia.wd5.myworkdayjobs.com/NVIDIAExternalCareerSite/job/US-CA-Santa-Clara/Senior-GPU-System-Architect_JR2017254 ## About the Role * BS/MS/PhD in Electrical Engineering, Computer Engineering, or equivalent experience. * 8 years or more of relevant experience in system design and/or ASIC/SoC architecture for GPU, CPU or networking products. * Deep understanding of communication interconnect protocols such as NVLink, Ethernet, InfiniBand, CXL and PCIe. * Experience with RDMA/RoCE or InfiniBand transport offload architectures. * Proven ability to architect multi-GPU/multi-CPU topologies, with awareness of bandwidth scaling, NUMA, memory models, coherency and resilience. * Experience with hardware-software interaction, drivers and runtimes, and performance tuning for modern distributed computing systems. * Strong analytical and system modeling skills (Python, SystemC, or similar). * Excellent cross-functional collaboration skills with silicon, packaging, board, and software teams. Ways to stand out from the crowd: * Background in system design for AI and HPC. * Experience with NICs or DPU architecture and other transport offload engines. * Expertise in chiplet interconnect architectures or multi-node fabrics and protocols for distributed computing. * Hands-on experience with interposer or 2.5D/3D package co-design. ## Description * Architect multi-GPU system topologies for scale-up and scale-out configurations, balancing AI throughput, scalability, and resilience. * Define, modify and evaluate future architectures for high-speed interconnects such as NVLink and Ethernet co-designed with the GPU memory system. * Collaborate with other teams to architect RDMA-capable hardware and define transport layer optimizations for GPU-based large scale AI workload deployments. * Use and modify system models, perform simulations and bottleneck analyses to guide design trade-offs. * Work with GPU ASIC, compiler, library and software stack teams to enable efficient hardware-software co-design across compute, memory, and communication layers. * Contribute to interposer, package, PCB and switch co-design for novel high-density multi-die, multi-package, multi-node rack-scale systems consisting of hundreds of GPUs.