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# ASIC Design Verification Manager, Google Cloud

- **Company:** Google LLC
- **Location:** Sunnyvale, CA, United States
- **Experience:** Experienced
- **Salary:** $192,000 - $278,000
- **Contract:** Permanent contract
- **Skills:** ARM Architecture, Bash Shell, Bioinformatics, Cloud Computing, Computer Engineering, Linux, Perl (Programming Language), Formal Verification, Python (Programming Language), System Testing, SystemVerilog, Scripting, Google Cloud, Application Specific Integrated Circuits, Information Technology, Front End Software Development
- **Published:** October 31, 2026
- **Apply:** https://www.careerbuilder.com/job-details/asic-design-verification-manager-google-cloud-sunnyvale-ca--dfe4468e-2dfc-492e-8197-4b4bce599a49

## About the Role

ASIC Design, Design Verification, Cloud Computing, ASIC Verification, ASIC Design, Design Verification, Cloud Computing, ASIC Verification, Computer Engineering, Computer Science, Experience owning outcomes and decision making, solving ambiguous problems and influencing stakeholders; deep expertise in domain., * Bachelors degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.

 * 10 years of experience with verification, SystemVerilog, and UVM.
 * 3 years of experience in people management., * Masters degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.
 * Experience with universal verification methodology (UVM), SystemVerilog, or other scripting languages such as Python, Perl, Shell, Bash, etc.
 * Knowledge of general purpose operating systems such as Linux and Android.
 * Familiarity with ARM Instruction Set Architecture.

## Description

* Guide the functional verification team for portions of TPU designs, setting and communicating individual and team priorities that support organizational goals, providing regular feedback and coaching, and developing functional verification infrastructure across subchip, subsystem, and fullchip level environments.
 * Define and guide advanced verification strategies, including the use of simulation, for bug hunt, formal verification for corner-case bugs and emulation for system validation.
 * Partner with front-end design, architecture, and performance teams to help ensure architectural compliance and achievement of performance goals.
 * Analyze coverage from various dimensions and develop monitors and checkers for quality assurance.

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