> Markdown version of [/jobs/ext/4515355-senior-digital-design-engineer-air-dominance-and-strike](https://www.wearedevelopers.com/jobs/ext/4515355-senior-digital-design-engineer-air-dominance-and-strike). Every page supports `.md` or `Accept: text/markdown`. Links point to the HTML versions so they work for humans too. Agent guide: [/agents.md](https://www.wearedevelopers.com/agents.md). --- # Senior Digital Design Engineer, Air Dominance and Strike - **Company:** Anduril Industries - **Location:** Costa Mesa, CA, United States - **Experience:** Expert - **Salary:** $166,000 - $220,000 - **Contract:** Permanent contract - **Skills:** Board Bringup, Adobe InDesign, Artificial Intelligence, Computer Vision, JIRA, Code Review, Computer Engineering, Continuous Integration, Software Debugging, Linux, Logic Synthesis of Circuits, Embedded Software, Ethernet, Field-Programmable Gate Array (FPGA), Design of User Interfaces, PCI Express, Rapid Prototyping Process, Software Engineering, SystemVerilog, Systems Integration, Tcl (Programming Language), Universal Asynchronous Receiver/Transmitter, Verilog, VHSIC Hardware Description Language (VHDL), Scripting, Serial Peripheral Interface, Application Specific Integrated Circuits, Fpga Hardware, State Machines, Git Flow - **Published:** October 31, 2026 - **Apply:** https://www.careerbuilder.com/job-details/senior-digital-design-engineer-air-dominance-and-strike-costa-mesa-ca--d85c45a7-b264-4f67-9ddf-d10490117e7e ## About the Role Technical/Engineering Design, Graphic Design, Sales, Aerospace and Defense, Business Model, Operating Systems, Artificial Intelligence (AI), Computer Vision, Military, United States Military, * Bachelor''s degree in Electrical Engineering, Computer Engineering, or related field. * 8+ years of FPGA, ASIC, or closely related digital design experience. * Proficiency in VHDL and/or Verilog/SystemVerilog. * Hands-on experience with simulation, synthesis, implementation, and timing closure on modern FPGA platforms. * Hands-on debug experience in simulation and on hardware. * Strong digital design fundamentals, including clocking, resets, state machines, CDC awareness, and interface design. * Proficiency with Linux-based development environments, Git-based workflows, and Tcl and/or Python scripting. * Strong written and verbal communication skills. * Eligible to obtain and maintain an active U.S. Secret security clearance., * 12+ years of FPGA development experience. * Experience owning a major functional block, subsystem, or full FPGA design from concept through integration. * Familiarity with AMD (Xilinx), Intel/Altera, or Lattice FPGA development environments. * Experience with embedded systems and hardware/software co-design, including AMD (Xilinx) Vitis or similar tooling. * Familiarity with common high-speed or embedded interfaces such as Ethernet, PCIe, JESD204, SPI, I2C, UART, CAN, or MIL-STD-1553. * Familiarity with DO-254 or similar military or safety-critical development standards. * Experience building or improving reusable IP, verification infrastructure, CI/CD flows, or team workflows. * Familiarity with modern build and development tooling such as Jira, automated regression infrastructure, and reproducible build environments. ## Description We are looking for an Senior FPGA Design Engineer to join our team in Costa Mesa, CA. In this role, you will design and integrate RTL for FPGA and SoC platforms used in high-performance embedded systems, avionics, and mission-critical hardware. You will work across the full development cycle, from requirements and microarchitecture through RTL implementation, simulation, synthesis, timing closure, lab bring-up, and system integration., * Design and implement RTL in VHDL, Verilog, or SystemVerilog for FPGA and SoC-based systems. * Translate system and hardware requirements into microarchitecture, interface definitions, and implementation plans. * Own FPGA designs or major functional blocks from architecture through integration, timing closure, and lab debug. * Develop and execute simulation, synthesis, and implementation flows, including timing and resource closure. * Debug functional, timing, and integration issues in simulation and on hardware. * Support board bring-up, lab validation, and system integration on target platforms. * Collaborate with hardware, embedded software, systems, and verification engineers to deliver complete solutions. * Participate in design reviews, code reviews, and technical documentation. * Contribute to reusable design practices, coding standards, and development workflows. * Support rapid prototyping while maintaining the engineering rigor required for production hardware., To ensure your safety and help you navigate your job search with confidence, please keep the following critical points in mind: * No Financial Requests: Anduril will never solicit payment or demand personal financial details (such as banking information, credit card numbers, or social security numbers) at any stage of our hiring process. Our legitimate recruitment is entirely free for candidates. * Please always verify communications: * Direct from Anduril: If you receive an email from one of our recruiters, it will only come from an @anduril.com address. * Via Agency Partner: If contacted by a recruiting agency for an Anduril role, their email will clearly identify their agency. If you suspect any suspicious activity, please verify the agency''s authenticity by reaching out to contact@anduril.com. * Exercise Caution with Unsolicited Outreach: If you receive any communication that appears suspicious, contains grammatical errors, or makes unusual requests, do not engage. Always confirm the sender''s email domain is @anduril.com before providing any personal information or clicking on links. * What to Do If You Suspect Fraud: Should you encounter any questionable or fraudulent outreach claiming to be from Anduril, please report it immediately to contact@anduril.com. Your proactive caution is invaluable in protecting your personal information and upholding the security and trustworthiness of our recruitment efforts.