> Markdown version of [/jobs/ext/4571250-engineer-digital-3](https://www.wearedevelopers.com/jobs/ext/4571250-engineer-digital-3). Every page supports `.md` or `Accept: text/markdown`. Links point to the HTML versions so they work for humans too. Agent guide: [/agents.md](https://www.wearedevelopers.com/agents.md). --- # Engineer Digital 3 - **Company:** Prolim Global Corporation - **Location:** San Diego, CA, United States - **Experience:** Experienced - **Salary:** $301,600.0 - **Contract:** Temporary contract - **Skills:** Agile Methodology, Systems Engineering, Communications Protocols, Software Debugging, Digital Arts, Logic Synthesis of Circuits, Ethernet, Firmware, Formal Verification, Field-Programmable Gate Array (FPGA), PCI Express, Software Requirements Analysis, System on a Chip, Universal Asynchronous Receiver/Transmitter, VHSIC Hardware Description Language (VHDL), Vivado, Serial Peripheral Interface, Fpga Hardware, Software Defined Radio, Hardware Debugging - **Published:** November 4, 2026 - **Apply:** https://www.thejobnetwork.com/job/ddbba03b-cfde-4005-b8b8-fad2c89515eb/engineer-digital- ## About the Role * Bachelor's degree in engineering or related STEM field with 5+ years of relevant experience, or Master's degree with 3+ years of experience. * Strong hands-on experience with VHDL design and verification. * Experience with FPGA development environments. * Excellent written and verbal communication skills. * Strong understanding of engineering development processes. * Active Secret Security Clearance is required prior to start., * 8+ years of professional FPGA/Digital Engineering experience. * Experience with OSVVM verification methodologies. * Experience with AMD/Xilinx FPGA families (Zynq, Kintex, Ultrascale, Versal). * Knowledge of communication protocols including: * I2C * SPI * UART * PCIe * Ethernet * Experience with FPGA development tools including: * Vivado * Quartus * QuestaSim * Experience achieving FPGA timing closure and physical constraints. * Experience creating VHDL test benches and formal verification. * Hardware debugging using oscilloscopes and logic analyzers. * Experience supporting DoD communication systems is highly preferred., * FPGA Design * VHDL * OSVVM * Vivado * AMD/Xilinx FPGA * Digital Design Verification * SDR Firmware Development * FPGA Timing Closure * Communication Protocols (SPI, I2C, UART, PCIe, Ethernet) * Hardware Debugging * Agile Development * Defence/Aerospace Engineering ## Description PROLIM is seeking an experienced Engineer Digital 3 for one of our top clients, Northrop Grumman, in San Diego, CA. This is an exciting opportunity to contribute to advanced defence and mission-critical programs by developing and integrating FPGA-based digital solutions for Software Defined Radio (SDR) platforms. The ideal candidate will have strong expertise in VHDL, FPGA development, digital verification, and communication protocols within a defence or aerospace environment. Key Responsibilities * Design, develop, integrate, and test VHDL-based FPGA digital designs for Software Defined Radio (SDR) applications. * Develop FPGA firmware using industry-standard FPGA development environments and tools. * Collaborate with Systems Engineering, Digital Engineering, Hardware, and Integration & Test teams. * Participate in Agile and/or Waterfall development methodologies. * Analyse system requirements, timing, and performance to resolve design challenges. * Develop and execute VHDL verification strategies and test benches. * Support FPGA integration, debugging, validation, and timing closure activities. * Translate system requirements into FPGA design documentation and test specifications.