> Markdown version of [/jobs/ext/4571727-leader-hardware-engineering](https://www.wearedevelopers.com/jobs/ext/4571727-leader-hardware-engineering). Every page supports `.md` or `Accept: text/markdown`. Links point to the HTML versions so they work for humans too. Agent guide: [/agents.md](https://www.wearedevelopers.com/agents.md). --- # Leader, Hardware Engineering - **Company:** Cisco Systems, Inc. - **Location:** New York, NY, United States - **Experience:** Expert - **Salary:** $194,600 - $285,700 - **Contract:** Permanent contract - **Skills:** Board Bringup, Computer Engineering, Dynamic Random-Access Memory, Ethernet, Field-Programmable Gate Array (FPGA), Python (Programming Language), PCI Express, Schematic Capture, Signal Integrity, Tcl (Programming Language), Verilog, VHSIC Hardware Description Language (VHDL), Serial Peripheral Interface, Application Specific Integrated Circuits, System-level Testing, Cisco - **Published:** November 4, 2026 - **Apply:** https://diversityjobs.com/career/18827754/Leader-Hardware-Engineering-California-San-Jose ## About the Role * Bachelors + 15 years of related experience, or Masters + 12 years of related experience, or PhD + 8 years of related experience Also requires 4+ years of supervisory experience. * Experience with complex high-speed board design and board bring-up. * Experience with schematics/layout, Hardware bring-up, trouble-shooting, system level testing. * Experience in managing teams and leading technical projects., * Experience with working with Software team on system bring-up and porting, devices configuration * Prior experience with common HW technology, including power, clock, memory, CPU, and variety of system interfaces. * Experience with schematics, PCB and Verilog HDL/VHDL design * Experience on the scripts (Python, Tcl, etc.) * Experience with lab bring up and design validation of products * Knowledge on the Ethernet protocol is a plus * Experience with access switch Ethernet interfaces: gigabit, multi gigabit, 10 gigabit. * Experience with high-speed Ethernet interfaces: 25G, 100G, 400G, 800G. * Experience with DRAM, CPU subcomplex and control interfaces such as PCIe, I2C, SPI, MDC/MDIO * ## Description The Leader, Hardware Engineer is a key member of the Cisco Purpose Built Switch hardware team. The team is expected to bring up the system to work with multiple groups including ASIC, DFT, Signal Integrity, software, Diagnostics and Manufacturing team to resolve any design issues. * Define and design the next generation Hyperscaler Switch hardware based on Silicon One and/or merchant ASIC. * Leading a team of dedicated engineers for system and board level specification, schematic capture, FPGA design, ASIC/System level bring up and troubleshooting. * Leads large and/or complex projects from requirements to execution to completion * Develops action plans for optimal resource utilization and management of financial/material resource usage, including supporting Cisco net zero standards * Act as technical liaison with major component Suppliers for the product