> Markdown version of [/jobs/ext/4585098-hardware-engineer-sr-stf-e5](https://www.wearedevelopers.com/jobs/ext/4585098-hardware-engineer-sr-stf-e5). Every page supports `.md` or `Accept: text/markdown`. Links point to the HTML versions so they work for humans too. Agent guide: [/agents.md](https://www.wearedevelopers.com/agents.md). --- # Hardware Engineer Sr Stf - E5 - **Company:** Lockheed Martin - **Location:** Salina, NY, United States - **Experience:** Expert - **Salary:** $129,000.0 - $239,600.0 - **Contract:** Permanent contract - **Skills:** Computer Engineering, Hardware Design, Hardware Infrastructure - **Published:** November 5, 2026 - **Apply:** https://www.clearancejobs.com/jobs/9293445/hardware-engineer-sr-stf-e5 ## About the Role Candidate must possess a BS in an engineering discipline (e.g. Mechanical, Electrical, and/or Computer Engineering) with 9 years of experince. -Detailed HW development experience. -Ability to obtain and hold a DOD Security clearance. Desired Skills * Significant EPDM or similar experience * Lead hardware engineering experience * Cross-Functional or Integrated Product team leadership experience. * Cost Account management (CAM) experience. * Knowledge of Earned Value Management and tracking practices. ## Description The Lead Hardware Engineer (LHE) will provide technical leadership and engineering support for the design, development, integration, and sustainment of hardware components within the radar system., * + Ensure that the program's Hardware Engineering processes/procedures and other required process assets are defined (in compliance with RMS policies, processes, and procedures, and contract requirements) and followed. + Address staffing, resource, and infrastructure needs for hardware engineering; ensure that the Hardware Engineering discipline is represented as appropriate on IPTs. + Develop, maintain, and ensure implementation of the Hardware Development Plan (HDP); establish and track hardware related TPMs. + Identify hardware items requiring Design for Assembly (DFA), Design for Manufacturing (DFM), or any other Design For Six Sigma (DFSS) analysis. Communicate these activities to the Program Excellence Lead for inclusion into the Program Excellence Plan (PEP). + Ensure the flow-down of Hardware Engineering requirements to subcontractors. + Be responsible for Hardware Engineering cost, schedule and technical performance; provide an integrated Hardware Engineering solution to the program. A few specific items are listed below: o Develop Hardware Engineering portion of program's multi-functional resource/schedule estimates; obtain functional approval. o Ensure adequate trades, simulations, and analyses are performed. o Be responsible for development of the Hardware Architecture. o Ensure common solutions are implemented to common hardware problems across IPTs. o Ensure the quality of hardware engineering work products. o Define the peer reviews required for each work product in the Hardware Development Plan. Accountable for ensuring at least one independent reviewer is identified for each peer review and that required reviews are planned and held. o Understand and manage the technical effects of changes to the baseline throughout the Lifecycle within cost and schedule constraints. o Monitor DTC targets. o Help establish and track hardware related Critical and Major Characteristics and Components. o Ensure hardware Critical and Major Components are appropriately marked. + Participate in Risk and Opportunity management. + Champion continuous improvement activities for the HW Engineering discipline and adopt 1LMX techniques and approaches. + Support Hardware Engineering discipline representatives in IPTs in the resolution of programmatic and organizational issues and conflicts. + Report status and issues for Hardware Engineering activities to the PIT/SEIT and Integrated Engineering functional management. + Mentor junior engineers and facilitate cross-functional collaboration with software, systems, and manufacturing teams + Provide proposal support for domestic and international customers + Manage CCB for all related Hardware artifacts