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# Staff Device Development Engineer

- **Company:** Samsung
- **Location:** Austin, TX, United States
- **Experience:** Expert
- **Contract:** Permanent contract
- **Skills:** Data Mining, Transistor, Interoperability, SAP Sales and Distribution, SAS (Software), Statistical Process Control (SPC), JMP (Statistical Software), Stable Diffusion, Spotfire
- **Published:** November 5, 2026
- **Apply:** https://sec.wd3.myworkdayjobs.com/Samsung_Careers/job/12100-Samsung-Blvd-Austin-TX-USA/Staff-Device-Development-Engineer_R121562

## About the Role

* Bachelor's of Science or Engineering (Electrical, Computer, Material Science, or related areas) required. Masters or PhD is a plus.
 * 7+ years of semiconductor industry experience is required; 10+ years of experience is highly preferred.
 * Demonstrated experience with technology, process & qualification development milestones in order to meet customer and industry specifications.
 * Understanding of the interactions between process and Electrical test. Knowledge of process flow.
 * Familiarity with unit processes including thin films deposition, etch, diffusion, wet process, CMP, Photolithography, etc.
 * Analysis skills, including electrical device characterization, yield analysis, data mining, DOE, and SPC using JMP or Spotfire.
 * SPICE modeling/simulation, MHC, PDK update experience.

## Description

SAS is looking for a highly driven and technically accomplished engineer to lead critical initiatives within the New Technology Bridge Device Integration team. This is a high-impact role responsible for the optimization of transistor performance and the definition of targeting strategies to ensure industry-leading yield, reliability, and manufacturability for the 14nm derivative generation. The ideal candidate would have Device physics interaction understanding across all modules - Fin/PC, SD, RMG/MOL, BEOL - in order to work closely with Module Integration and Process Architecture teams to develop ideal Transistor performance and targeting conditions on next generation technologies.

Role and Responsibilities

Here's What You'll Be Responsible For:

 * Ensure targeting of transistor focused Electrical Test (ET) trends to Customer/Product Specifications and perform timely root cause study to shifts or abnormality.
 * Analyze process interactions (inline metrology, FDC, etc.) to ET while also understanding ET data effect on Parametric Yield.
 * Owns parametric yield, wafer acceptance electrical Test (WAT), model to hardware correlation (MHC) management for one or more customer accounts/products.
 * Design, execute, and analyze experiments to optimize transistor performance/variation with end goal of meeting design requirements while improving parametric yield and ensuring a reliable and manufacturable product.
 * Drive Task Force Teams to solve systematic yield, performance, or reliability issues.
 * Support unit process (ex: CMP, Etch, etc) or process integration team with evaluation of device impact for key change points