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# Senior ASIC Silicon Validation Engineer (NetSec)

- **Company:** Palo Alto Networks
- **Location:** Santa Clara, CA, United States
- **Experience:** Expert
- **Salary:** $156,400 - $253,000
- **Contract:** Permanent contract
- **Skills:** Application Services, Automation of Tests, Cyber Security, Software Debugging, Ethernet, Python (Programming Language), PCI Express, Proprietary Software, SystemVerilog, Systems Integration, Scripting, Application Specific Integrated Circuits, Software Verification, Large Language Models
- **Published:** November 6, 2026
- **Apply:** https://www.indeed.com/viewjob?jk=553575d068768191

## About the Role

* BS or MS in EE, CE, or CS or equivalent experience.
 * 5+ years of relevant silicon validation experience.
 * Proven success in taking ASICs to mass production.
 * Proficiency with lab equipment, logic analyzers, and oscilloscopes.
 * Background in validating one or more of the following high-speed interfaces: Ethernet, PCIE, DDR, HBM.
 * Expertise in Python and C.
 * Demonstrated proficiency or active experience integrating modern AI tools (e.g., LLM coding assistants, automated test generators, or ML-enhanced EDA features) into design, scripting, or validation workflows.
 * Familiarity with SystemVerilog and ASIC verification tools (e.g. VCS, Verdi).
 * Experience with networking and cybersecurity is preferred.
 * Demonstrated ownership and independence in planning, analyzing, debugging, driving vendors, and reporting status.
 * Strong leadership, collaboration, and communication skills.

## Description

As a Silicon Validation Engineer on the ASIC team, you will ensure that the ASICs in our groundbreaking next-generation firewall products meet or exceed industry-leading requirements for features, performance, and reliability. You will define silicon validation methodologies, develop infrastructure, write test plans, execute tests, and debug. You will validate networking ASIC functionality for packet processing, switching, routing, cryptography, and high-speed interfaces.

Your Impact

 * Create comprehensive silicon validation plans in collaboration with ASIC, system hardware, and software engineers.
 * Develop silicon validation methodologies and infrastructure using lab equipment, third-party applications, and proprietary software-driven platforms.
 * Execute every aspect of silicon validation test plans.
 * Debug cross-functional issues with ASIC, system hardware, and software engineers to validate the correctness of the ASICs.
 * Build powerful programs in Python and C to automate testing, regression, and debugging.