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Agent guide: [/agents.md](https://www.wearedevelopers.com/agents.md). --- # Senior CPU Performance Architect - **Company:** Google LLC - **Location:** Mountain View, CA, United States - **Experience:** Expert - **Salary:** $163,000.0 - $236,000.0 - **Contract:** Permanent contract - **Skills:** Bioinformatics, Computer Engineering, Microarchitecture, Linux, Multiprocessing, Reduced Instruction Set Computing, Caching, Information Technology, Instruction Set Architecture, Physical Design, Software Performance - **Published:** November 6, 2026 - **Apply:** https://www.techcareers.com/job.asp?id=3499584137&tx=JR2317FFK&pt=1&aff=0B19D771-A501-4A5E-8338-2A822B784D54&utm_source=Job%20Feed&utm_medium=textkernel&utm_campaign=DE&utm_term=0B19D771-A501-4A5E-8338-2A822B784D54 ## About the Role Experience driving progress, solving problems, and mentoring more junior team members; deeper expertise and applied knowledge within relevant area., * Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience. * 8 years of experience with CPU microprocessor architecture or CPU micro-architecture. * Experience in performance modeling, performance analysis, and workload characterization. * Experience in software performance analysis and improvement, and High-Performance computer architectures (e.g., CPU, memory subsystem, multiprocessing)., * Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on Computer Architecture, or a related field. * Experience leading CPU microarchitecture exploration, performance model development, performance analysis, performance correlation, and workload characterization. * Experience with one or more CPU microarchitectural blocks such as Caches or Branch Predictors. * Knowledge of processor instruction set architecture (e.g., ARM, RISC-V, x86). * Knowledge of system software components, such as Linux, drivers, and runtime. ## Description * Define and write CPU subsystem architecture specifications. * Develop accurate models for performance analysis and microarchitecture study. * Plan and evaluate ARM's architecture features from both architecture and performance angles. * Deliver solutions to complex CPU performance, microarchitecture design, tool infrastructure, and methodology problems that are ambiguous or lack clear precedent. * Collaborate with RTL, Design Verification, and Physical Design teams to develop a high performance and efficient CPU implementation. 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