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# Founding DSP Engineer

- **Company:** Evona, Inc.
- **Location:** San Francisco, CA, United States
- **Contract:** Permanent contract
- **Skills:** Board Bringup, Systems Engineering, Embedded Software, Field-Programmable Gate Array (FPGA), Hardware Design, Python (Programming Language), MATLAB, Signal Processing, System on a Chip, SystemVerilog, VHSIC Hardware Description Language (VHDL), Vivado
- **Published:** November 7, 2026
- **Apply:** https://www.juju.com/job/28_25303_e27e0ff735c1ce1368f9ca6fd8c45a47

## About the Role

* Strong hands-on experience with AMD/Xilinx RFSoC (Zynq UltraScale+ and/or Versal).
 * Deep understanding of DSP algorithms and their implementation in FPGA/SoC hardware.
 * Experience leading hardware architecture, development and board bring-up.
 * Proficiency with Vivado/Vitis, RTL (VHDL/SystemVerilog) and MATLAB/Python.
 * Background in RF communications, telecom, satellite communications, radar or similar high-performance signal processing applications.
 * Ability to operate independently and take technical ownership in an early-stage environment.

Space industry experience is not required. Engineers from telecommunications, wireless communications and RF hardware development are strongly encouraged to apply.

## Description

* Lead the architecture and development of DSP hardware systems using AMD/Xilinx RFSoC and Versal platforms.
 * Translate DSP algorithms and system performance requirements into practical hardware architectures.
 * Drive hardware development from initial requirements through board design, integration, bring-up and validation.
 * Work across FPGA, RF, embedded software and systems engineering teams.
 * Develop and optimize high-throughput signal processing chains, including filtering, channelization, synchronization and beamforming.
 * Influence key technical decisions as the company scales its engineering organization.