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Agent guide: [/agents.md](https://www.wearedevelopers.com/agents.md). --- # Security Firmware Architect, SSD - **Company:** Micron Technology, Inc. - **Location:** San Jose, CA, United States - **Experience:** Expert - **Salary:** $166,000 - $326,000 - **Contract:** Permanent contract - **Skills:** Artificial Intelligence, Code Review, Cyber Security, Continuous Integration, Learning Management Systems, Software Debugging, Programming Tools, Embedded Software, Federal Information Processing Standards (FIPS), Firmware, Flash Memory, Field-Programmable Gate Array (FPGA), Fuzz Testing, Joint Test Action (IEEE Standards), Python (Programming Language), Key Management, PCI Express, Public Key Infrastructure, Program Analysis, Real-Time Operating Systems, Sed (Programming Language), Software Security, Data Management, U-Boot, Nvme - **Published:** November 7, 2026 - **Apply:** https://www.juju.com/job/28_25197_d288cb8bfae72733989e5e39f7168f05 ## About the Role * Bachelor's degree in Electronics Engineering, Embedded Systems, Cyber Security or a related field * 10+ years of experience in security firmware development, with demonstrated ownership of security architecture for shipped products * Deep expertise in applied cryptography and firmware security architecture: AES-XTS, Root of Trust, Secure Boot, Device Attestation, TRNG/DRBG, Key Management and Public Key Infrastructure * Post-quantum cryptography expertise (LMS, ML-DSA, ML-KEM), including the architectural trade-offs of deploying them on embedded systems * Strong knowledge of enterprise storage security standards (PCIe, NVMe, OCP, TCG, IEEE 1667, DMTF SPDM) * Proficiency in C and Python for firmware development, * Master's degree or PhD in Electronics Engineering, Embedded Systems, Cyber Security or a related field * Proven technical leadership setting security architecture and direction across multiple teams or product lines * Active participation or leadership in industry standards groups (TCG, OCP, DMTF, PCI-SIG) * Experience with Caliptra Root of Trust and OCP L.O.C.K. integration * Experience leading SDL programs, including threat modeling, fuzz testing, static and dynamic analysis, code review, CI/CD and certification readiness * Experience mentoring engineers and building security engineering best practices * Experience resolving complex security protocol issues on SoC, FPGA and simulation platforms using JTAG, memory dumps and bus analyzers * Embedded firmware experience with controller initialization, boot and update processes, RTOS, IPC and NAND Flash management * Experience with Rust for firmware development * Familiarity with AI-assisted developer tools for coding, testing and code review, with human validation ## Description As a Principal Engineer and Security Architect on Micron's enterprise SSD team, you will set the security architecture and technical direction for Micron's next-generation storage products. You will own the trust model and cryptographic foundation across product generations, including Root of Trust, Secure Boot, Device Attestation, data-at-rest encryption and Self-Encrypting Devices (SED). You will also define Micron's strategy and roadmap for moving to post-quantum cryptography. As the senior technical authority on firmware security, you will guide architecture decisions across firmware, hardware, SoC and product teams. You will lead threat modeling and the Security Development Lifecycle, mentor engineers, and represent Micron in industry standards bodies such as OCP, TCG, DMTF and PCI-SIG., * Define and own the end-to-end security architecture for Micron enterprise SSDs, including trust boundaries, threat models and mitigations across the full product lifecycle * Set the multi-generation firmware security roadmap and keep it aligned with customer requirements, industry standards and the threat landscape * Architect cryptography-based solutions, including data encryption, Root of Trust, Secure Boot and Update, Device Attestation and SED, and guide teams through implementation, debug and production * Lead Micron's post-quantum cryptography strategy and migration to LMS, ML-DSA and ML-KEM, weighing security strength against embedded system constraints * Turn OCP, TCG, NVMe, PCIe and DMTF SPDM specifications into product security requirements and reference architectures * Own the Security Development Lifecycle: architecture and design reviews, threat modeling, security code review, fuzz and vulnerability testing, FIPS certification and OCP S.A.F.E. compliance * Act as the escalation point for complex security protocol and compatibility issues on SoC, FPGA and simulation platforms * Represent Micron in industry standards groups and with customers, and influence security specifications and ecosystem direction * Mentor and grow security firmware engineers, and set technical standards and best practices across teams