> Markdown version of [/jobs/ext/4621051-sr-fpga-engineer-amazon-leo-for-government](https://www.wearedevelopers.com/jobs/ext/4621051-sr-fpga-engineer-amazon-leo-for-government). Every page supports `.md` or `Accept: text/markdown`. Links point to the HTML versions so they work for humans too. Agent guide: [/agents.md](https://www.wearedevelopers.com/agents.md).

---

# Sr. FPGA Engineer, Amazon Leo for Government

- **Company:** Amazon.com, Inc.
- **Location:** Los Angeles, CA, United States
- **Experience:** Expert
- **Contract:** Permanent contract
- **Skills:** Boolean Algebra, Modems, Software Debugging, Linux, Distributed Systems, Perl (Programming Language), Firmware, Field-Programmable Gate Array (FPGA), Hardware Design, Python (Programming Language), PCI Express, Signal Processing, SystemVerilog, Verilog, VHSIC Hardware Description Language (VHDL), Vivado, Scripting
- **Published:** November 7, 2026
- **Apply:** https://www.careerbuilder.com/job-details/sr-fpga-engineer-amazon-leo-for-government-northridge-ca--dd3b1494-8021-405e-8d26-8c37620fefd5

## About the Role

FPGA, Government, Broadband, Hardware Design, Distributed Computing, DNA, Algorithms, Communication Systems, Modems, Product Development

## Description

As a Sr. FPGA engineer on the Amazon Leo for Government Product Development team you will create FPGA solutions to support Amazon Leo satellite communication system. This is a unique opportunity to define a ground breaking new system with few legacy constraints. You will work with systems and algorithm teams to define/develop/implement/test/release FPGA-based modem solutions to enable Amazon Leo. In particular, your work will power high-speed optical communication links while making use of the latest generations of FPGA technologies, design processes, and tools., * Create and release FPGAs through the development phases of uArchitecture-RTL Design-Physical Implementation-Timing Closure-Simulation Validation- Lab Based Silicon Validation.

 * Collaborate with RF and Optical Communications and Signal Processing system architects and design engineers to define, design, implement, and test modem and digital logic functions in FPGA technology.
 * Writing RTL code, developing testbenches, performing simulation and timing closure, and debugging in a laboratory environment.
 * Proficiency in Verilog, SystemVerilog, or VHDL; experience with Xilinx Vivado or Microchip Libero; proficiency in Linux, scripting (Python/Perl), and interface protocols like PCIe or DDR.
 * Collaborate with system architects and design engineers to implement digital logic functions in FPGA prototypes to validate/tradeoff architecture & design alternatives.
 * Collaborate with systems architects, HW engineering design teams & FW/SW design teams to bring up and test systems combining FPGA, firmware, Optics, and Networking functions.
 * Drive trade-off analysis to benefit customer experience and optimization of target technology resources for cost/size/power/performance/features
 * Utilize FPGA design tools including Vivado / Vitis with new System Verilog / VHDL RTL code and existing/new IP core integration.

The role is located in Northridge, CA, and includes US relocation benefits.

Security Clearance: Candidates must be able to obtain and maintain a US Government security clearance of TS/SCI, so you must be a U.S. citizen for consideration.

Export Control : This position requires that the candidate selected be a U.S. Citizen in order to comply with U.S. government-imposed requirements related to the nature of the work and/or where it will be performed.