> Markdown version of [/jobs/ext/4623372-senior-ssd-firmware-engineer-ftl-c-c](https://www.wearedevelopers.com/jobs/ext/4623372-senior-ssd-firmware-engineer-ftl-c-c). Every page supports `.md` or `Accept: text/markdown`. Links point to the HTML versions so they work for humans too. Agent guide: [/agents.md](https://www.wearedevelopers.com/agents.md). --- # Senior SSD Firmware Engineer (FTL, C/C++) - **Company:** RELEVANTE INC - **Location:** Rancho Cordova, CA, United States (Remote available) - **Experience:** Expert - **Salary:** $180,000.0 - **Contract:** Permanent contract - **Skills:** Adobe Flash, C++ (Programming Language), Computer Engineering, Data Structures, Software Debugging, Linux, RAID, Dynamic Random-Access Memory, Embedded Software, Serial ATA, Firmware, Flash Memory, Joint Test Action (IEEE Standards), Meta-Data Management, PCI Express, Git, Information Technology, Decoding, Nvme - **Published:** November 7, 2026 - **Apply:** https://www.adzuna.com/details/5942897553 ## About the Role * Experience: 3+ years of SSD controller and firmware architecture * Focus: Flash Translation Layer: garbage collection, wear leveling, power-loss protection * Skills: C/C++, FTL, NAND flash, PCIe/NVMe or SATA, JTAG/ICE, Git * Also searched as: FTL Engineer, Embedded Firmware Engineer, SSD Firmware Developer, Storage Firmware Engineer, * Master's in Electrical Engineering, Computer Engineering, Computer Science, or related * 3+ years of SSD controller/firmware architecture experience, including FTL * Strong C/C++ and data structures * Hands-on JTAG/ICE debugging * Git and strong written and verbal communication Nice to have * SATA/PCIe (NVMe) and NAND protocol knowledge * Linux system debugging * Logic and bus protocol analyzer experience * Mandarin reading and writing, FTL algorithms (garbage collection, wear leveling, bad block and metadata management) in C/C++. ## Description * Design and maintain FTL I/O flow, garbage collection, and wear leveling * Build bad block management and metadata structures for fast mapping-table rebuild * Implement RAID encode/decode and error handling for read disturb, P/E failures, and retention loss * Design and verify power-loss protection and recovery * Optimize parallelism, DRAM/SRAM use, and write amplification, and debug with traces and stress tests