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# Principal Hardware Architect & Engineering Manager

- **Company:** DELPHI AUTOMOTIVE PLC
- **Location:** Irvine, CA, United States
- **Experience:** Expert
- **Contract:** Permanent contract
- **Skills:** Board Bringup, Software Debugging, Field-Programmable Gate Array (FPGA), Hardware Compatibility (Software Requirements), Hardware Design, PCI Express, Release Management, Schematic Capture, Digital Access Carrier System, Hardware Infrastructure
- **Published:** November 7, 2026
- **Apply:** https://www.juju.com/job/28_25197_8d02c73f1d9b4ca70fb11e8d5625b42c

## About the Role

* 15+ years experience in complex digital and mixed-signal hardware design
 * Proven ownership of complete board designs
 * Demonstrated experience leading engineering teams or technical groups
 * Deep expertise in PCIe, SERDES, JESD204B/C systems, clocking and power architecture
 * Working knowledge of FPGA architecture sufficient to guide integration
 * Strong bring-up and debug experience
 * Comfortable making final technical and execution decisions
 * U.S. Person (citizenship or permanent residency)

## Description

The Principal Hardware Architect & Engineering Manager is the senior technical and execution authority for DEG's FPGA-based hardware platforms. This role combines hands-on hardware architecture and board-level design with direct management of the hardware and FPGA engineering function.

This position owns:

 * Hardware system architecture
 * Hardware * FPGA integration
 * Engineering execution, priorities, and delivery

This is not a pure people-management role and not a layout-only role. It is a hands-on technical leadership position with real accountability., * Define system-level hardware architecture for PCIe, FMC/FMC+, and VPX platforms

 * Architect high-speed data acquisition and playback systems
 * Select and qualify key technologies (FPGAs, ADCs/DACs, clocking subsystems)
 * Define PCIe Gen4/Gen5 hardware architecture and throughput strategy
 * Establish hardware design standards reused across product families
 * Own technical tradeoffs involving performance, risk, cost, and schedule

Board-Level Hardware Design

 * Own complete board designs from concept through production release
 * Drive schematic capture for FPGA subsystems, high-speed serial interfaces, memory, power and clocking
 * Define PCB stackups, routing constraints, and SI/PI requirements
 * Work directly with PCB designers to ensure correct implementation
 * Lead board bring-up, debug, and validation
 * Resolve cross-discipline hardware issues (hardware * FPGA * test)
 * Define FPGA-facing hardware architecture (JESD204 topology, clock domains, reset strategy, PCIe interfaces)
 * Review FPGA designs for hardware compatibility and system correctness
 * Collaborate with FPGA engineers on interface definition and partitioning
 * Ensure hardware supports FPGA timing, clocking, and throughput needs

This role requires architectural understanding of FPGA systems, not day-to-day RTL development.

 * Directly manage hardware and FPGA engineers (employees and contractors)
 * Own engineering priorities, schedules, and resource allocation
 * Balance new development, sustaining engineering, and customer-driven work
 * Lead design reviews, release decisions, and technical risk assessments
 * Set expectations for design quality, documentation, and release discipline
 * Coordinate engineering work across hardware, FPGA, software, and test
 * Act as the escalation point for technical and execution issues

Technical Leadership & External Interface

 * Serve as the final technical authority for hardware decisions
 * Mentor engineers and enforce engineering standards
 * Interface with customers on deep technical topics when required
 * Support proposal development and technical responses
 * Preserve technical continuity across product generations