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# Sr. Digital Circuit Design Engineer

- **Company:** Omnivision
- **Location:** Irvine, CA, United States
- **Experience:** Expert
- **Salary:** $130,600 - $160,000
- **Contract:** Permanent contract
- **Skills:** Boolean Algebra, Virtual Camera Systems, Computer Engineering, Software Debugging, Digital Arts, Perl (Programming Language), Image Quality, Internet Services, Python (Programming Language), Requirements Management, Signal Processing, System on a Chip, SystemVerilog, Systems Integration, Verilog, Data Processing, Scripting, Data Management, Physical Design, Data Pipelines
- **Published:** November 7, 2026
- **Apply:** https://www.careerbuilder.com/job-details/sr-digital-circuit-design-engineer-irvine-ca--3f596ba5-31e9-4968-bdf1-1bf462365de9

## About the Role

Digital Circuit Design, Technical/Engineering Design, Internet Service Providers, System Integration (SI), Data Processing, Image Processing, Data Management, Requirements Management, Product Requirements Document (PRD), System-on-a-Chip (SoC), * Bachelor's degree in Electrical Engineering, Computer Engineering, or a closely related field, or equivalent practical experience

 * At least 4 years of hands-on experience designing RTL digital logic using Verilog/System Verilog, or equivalent industry experience
 * Proficiency with scripting languages such as Python or Perl to support design, verification, and automation workflows
 * Experience analyzing and optimizing area, power, and performance (PPA) trade-offs in digital designs, * Master's degree or PhD in Electrical Engineering, Computer Engineering, or a related discipline
 * Strong background in image sensor and camera system design or integration
 * Experience with high-speed MIPI interfaces (e.g., CSI-2 / D-PHY / C-PHY)
 * Practical experience with Image Signal Processing (ISP) architectures and pipelines

## Description

* Design and implement sensor timing control logic and contribute to ISP system-level integration
 * Participate in chip-level architecture definition, including analog interfaces, control logic, image data processing pipelines, and power/performance/area (PPA) trade-offs
 * Integrate and validate ISP data paths based on PRD, design specifications, and overall SoC architecture
 * Collaborate closely with CIS project leads and sensor digital/analog engineers for system integration and validation
 * Work with physical design teams on floor planning, timing closure, and DFT implementation
 * Perform full-chip integration and verification
 * Support chip bring-up, validation, and silicon debugging
 * Collaborate with algorithm and application engineers on image tuning, optimization, and qualification
 * Support silicon validation, debugging, and image quality tuning through production readiness