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# FPGA Engineer

- **Company:** Airbus S.A.S.
- **Location:** Saffron Walden, United Kingdom
- **Experience:** Expert
- **Contract:** Permanent contract
- **Skills:** Computer Engineering, Logic Synthesis of Circuits, Field-Programmable Gate Array (FPGA), VHSIC Hardware Description Language (VHDL), Vivado, Fpga Hardware, ModelSim, SC Clearance
- **Published:** November 8, 2026
- **Apply:** https://www.apply4u.co.uk/jobs/fpga-engineer/55398694

## About the Role

Experience of end-to-end FPGA design, development processes, and implementation methodologies (ideally for communications equipment or similar).
Experience of programming proficiently in VHDL and utilising at least one major FPGA simulation and synthesis tool.
Experience of designing with modern FPGA devices from key suppliers, specifically Altera, Microsemi, or Xilinx.
Experience of working within development environments such as Altera Quartus II, Mentor ModelSim, MicroSemi Libero IDE/SoC, or Xilinx Vivado (highly desirable)., This job requires an awareness of any potential compliance risks and a commitment to act with integrity, as the foundation for the Company's success, reputation and sustainable growth.

## Description

SECURITY CLEARANCE: Must have been a UK resident for a minimum of 5 years to be able to obtain SC Security Clearance, Reporting directly to the Head of Hardware Engineering, you will be responsible for executing allocated FPGA Work Packages within agreed cost, time, and quality constraints. You will play a crucial role in developing essential components and driving technical excellence across the development lifecycle.
HOW YOU WILL CONTRIBUTE TO THE TEAM
Analyse complex requirements to specify, document, and prepare comprehensive FPGA architectural designs and solutions.
Ensure all FPGAs are developed strictly in accordance with client standards and precise work breakdowns.
Make robust technical design decisions leveraging industry best practices and acquired technical expertise.
Support the design of essential, time-critical components to safeguard project schedules and overall deliverables.
Drive the success of both internal and external design and project reviews throughout the full development lifecycle.
Deliver allocated FPGA work packages efficiently to meet tight cost, time, and quality constraints.