> Markdown version of [/jobs/ext/4640288-field-programmable-gate-arrays-engineer](https://www.wearedevelopers.com/jobs/ext/4640288-field-programmable-gate-arrays-engineer). Every page supports `.md` or `Accept: text/markdown`. Links point to the HTML versions so they work for humans too. Agent guide: [/agents.md](https://www.wearedevelopers.com/agents.md).

---

# Field-Programmable Gate Arrays Engineer

- **Company:** ConsultNet
- **Location:** Sunrise, FL, United States
- **Experience:** Expert
- **Salary:** $150,000
- **Contract:** Permanent contract
- **Skills:** Bluetooth, Boolean Algebra, C++ (Programming Language), Computer Engineering, Software Debugging, Programming Tools, Logic Synthesis of Circuits, Ethernet, Field-Programmable Gate Array (FPGA), Hardware Description Language, Hardware Design, Team Foundation Server, Signal Processing, Software Requirements Analysis, Specman, TCP/IP, VHSIC Hardware Description Language (VHDL), Wi-Fi Technology, Application Specific Integrated Circuits, Fpga Hardware, Hardware Testing, Software Troubleshooting, Git, Wireless Technologies, Software Defined Radio, Software Version Control
- **Published:** November 8, 2026
- **Apply:** https://www.thejobnetwork.com/job/7ba38680-7901-4d35-b939-28b970bd8730/fieldprogrammable-gate-arrays-engineer

## About the Role

We are seeking a Senior FPGA Engineer to design, develop, integrate, and test advanced FPGA-based systems. This role will support projects from architecture and simulation through implementation, hardware integration, lab testing, and verification. The ideal candidate brings strong FPGA development experience, preferably with Xilinx, along with VHDL/HDL, software-defined radio, physical-layer communications, and hands-on hardware testing. The engineer will work closely with multidisciplinary teams and may also provide technical leadership or mentoring., * Approximately 6+ years of FPGA, digital design, or related engineering experience; flexibility for exceptional candidates.
\n

 * Bachelor's degree in Electrical Engineering, Computer Engineering, or a related technical field.
\n

 * Strong FPGA design and development experience.
\n

 * Experience with Xilinx FPGA devices preferred; Altera/Client FPGA experience may also be considered.
\n

 * Strong proficiency with VHDL, HDL, or similar hardware description languages.
\n

 * Experience with digital logic design, simulation, implementation, and debugging.
\n

 * Experience with software-defined radio (SDR) or similar RF/digital signal systems.
\n

 * Understanding of physical-layer communications such as Wi-Fi, Bluetooth, or comparable wireless technologies.
\n

 * Working knowledge of C/C++.
\n

 * Experience with testbenches, simulation, automation, and debugging.
\n

 * Hands-on experience testing FPGA designs on physical hardware in a lab environment.
\n

 * Familiarity with Git, TFS, or similar revision control tools.
\n

 * Ability to obtain and maintain the required security clearance.
\n

 * Ability to work in a hybrid environment with regular on-site attendance for hardware and lab work.
\n, * Strong Electrical Engineering background.
\n

 * Experience with Xilinx development tools and FPGA toolchains.
\n

 * Experience in SDR, RF, electronic warfare, radar, communications, sensing, or similar applications.
\n

 * Familiarity with Ethernet, TCP/IP, FPGA/ASIC concepts, and system-level hardware design.
\n

 * Experience scripting FPGA synthesis, build, or testing workflows.
\n

 * Technical leadership or mentoring experience.
\n

 * Strong troubleshooting, communication, and cross-functional collaboration skills.
\n

 * Strong attention to design quality, reliability, and documentation.
\n

## Description

The strongest candidate will be an FPGA engineer with solid hands-on hardware experience, strong Xilinx or comparable FPGA skills, VHDL/HDL development experience, and exposure to SDR or physical-layer signal processing. This is not a purely simulation-based role; the engineer will regularly implement, test, and troubleshoot designs on actual hardware as algorithms and system requirements evolve.