> Markdown version of [/jobs/ext/4646603-soc-integration-and-design-engineer](https://www.wearedevelopers.com/jobs/ext/4646603-soc-integration-and-design-engineer). Every page supports `.md` or `Accept: text/markdown`. Links point to the HTML versions so they work for humans too. Agent guide: [/agents.md](https://www.wearedevelopers.com/agents.md). --- # Soc Integration And Design Engineer - **Company:** Broadcom - **Location:** Northland, MI, United States - **Experience:** Expert - **Salary:** $109,700 - $175,500 - **Contract:** Permanent contract - **Skills:** Artificial Intelligence, JIRA, Dynamic Random-Access Memory, Formal Verification, Hardware Description Language, Issue Tracking Systems, Internet Protocol, Broadcom, System on a Chip, SystemVerilog, Universal Asynchronous Receiver/Transmitter, Verilog, VHSIC Hardware Description Language (VHDL), Application Specific Integrated Circuits, Git, Data Analytics - **Published:** November 9, 2026 - **Apply:** https://www.careerbuilder.com/job-details/soc-integration-and-design-engineer-northland-mi--d86844d0-565d-4b41-b07c-4338448d0593 ## About the Role Technical/Engineering Design, ASIC (Application Specific Integrated Circuit), Intellectual Property Development, Embedded Systems, Artificial Intelligence (AI), IP (Internet Protocol), System-on-a-Chip (SoC), Analysis Skills, Formal Verification, Simulation, * Experience with SOC architecture using AMBA interconnect, multiple processors and a variety of IO interfaces from basic UART to high speed DRAM with multiple lanes of high speed SERDES * Excellent communication and cross-functional collaboration skills + usage of cloud based documentation * Setup and execute CDC, synthesis, and formal verification across multiple designs and efficiently analyze results * Ability to analyze complex trade-offs and make data-driven decisions * Demonstrated expertise in HDL languages Verilog/VHDL and SystemVerilog * Strong understanding of physical implementation and timing closure with process variation -- Know file/model formats and usage at each step * Experience with JIRA, Git, and AI to support issue tracking and automation efficiency through the intergration and implementation process * Must have legal authorization to work in the US. This position does not have funding to support company-sponsored immigration support., * Bachelors in Engineering (EE, CE, or CS preferred) and 8+ years of related experience; OR Masters degree in Engineering and 6+ years of related experience. ## Description The ASIC Product Division in Broadcom, a leading supplier of state-of-the-art SoC and embedded IP, is looking for qualified individuals to work in SoC and IP development programs. The candidate will be joining a high performance design team responsible for state-of-the-art SoC development to meet customer requirements for AI and storage chips. This is an exciting opportunity to develop new ideas, design the next generation of leading-edge products, and work on the most advanced technologies in the industry. Responsibilities: * Participate in defining the overall SOC architecture and integrating IP * Ensure quality design through detailed design analysis using leading edge tools * Lead the extended team to support functional simulation and perform synthesis, formal verification, constraint definition/validation, and design validation * Collaborate with Internal and External teams to enable customer success * Refine solution by consulting with layout and DFT engineers to optimize area, performance and yield * Generate collateral to support an SoC release including design specifications