> Markdown version of [/jobs/ext/4669633-ai-inference-framework-engineer](https://www.wearedevelopers.com/jobs/ext/4669633-ai-inference-framework-engineer). Every page supports `.md` or `Accept: text/markdown`. Links point to the HTML versions so they work for humans too. Agent guide: [/agents.md](https://www.wearedevelopers.com/agents.md). --- # AI Inference Framework Engineer - **Company:** quadric, Inc - **Location:** Hillsborough, CA, United States - **Experience:** Experienced - **Salary:** $160,000 - $195,000 - **Contract:** Permanent contract - **Skills:** Artificial Intelligence, Application Frameworks, Artificial Neural Networks, C++ (Programming Language), Compilers, Nvidia CUDA, Cursor, Memory Management, Python (Programming Language), Open Source Technology, Tensorflow, Perplexity AI, Graphics Processing Unit (GPU), Pytorch, Large Language Models, Claude Code, AI Coding Agents, Backend, GGUF, Bitcoin, Model Inference - **Published:** November 11, 2026 - **Apply:** https://www.careerbuilder.com/job-details/ai-inference-framework-engineer-burlingame-ca--4e4679a2-5b41-4589-9753-334d7a2c9ea6 ## About the Role Artificial Intelligence (AI), Artificial Intelligence (AI), Neural Networks, Embedded Systems, C++ Programming Language, Industrial Robotics, High Tech Industry, Bitcoin, Memory Hardware, GPU (Graphics Processing Unit), * 3+ years building or extending ML frameworks or inference runtimes * BS/MS in CS/CE or related fields * Strong C/C++ and Python * Solid understanding of framework internals: tensor memory management, graph scheduling, operator dispatch * Solid understanding of AI compute performance analysis and optimization * Fluent with AI coding agents (e.g. Claude Code, Cursor), and interested in building agent-driven workflows for backend and model bring-up Preferred * Experience writing an accelerator backend (CUDA, Metal, Vulkan, Hexagon or another NPU) for an open-source framework * Contribution to open-source frameworks (PyTorch, llama.cpp, vLLM) * Understanding of low level AI compute pipelines, CPU/NPU, DMA * Understanding of graph compilers and kernel fusion What We Offer The base salary range for this position is $160,000 to $195,000. This range reflects the full span of levels and geographies at which Quadric hires for this role. The actual base salary offered will depend on a number of factors, including the specific level of the role, years and depth of relevant experience, technical skills and competencies, the criticality of the role to the business, internal equity, and work location. In addition to base salary, this role is eligible for equity and a discretionary annual performance bonus as applicable to the role and level., If this role resonates with you, we encourage you to apply even if your experience does not perfectly match every qualification. We value potential, curiosity, and a willingness to learn just as much as direct experience., Quadric participates in the E-Verify program to confirm employment eligibility for U.S.-based roles. As part of this process, applicants may review the following notices, which explain your rights and our participation in E-Verify. These notices are provided in English and Spanish. * E-Verify Participation Notice (English | Spanish) * Right to Work Notice (English | Spanish) ## Description * Implement framework backend interface, memory allocation, compute dispatch, registration and operators/kernels * Implement model compute pipelines including prefill, decode, batching, multi-sequence and multi-modal * Support important framework serving features including KV-cache management, paged attention, continuous batching, speculative decoding Optimize framework performance and accuracy for GPNPU backend * Reduce host-device dispatch overhead, implement graph capture/replay, integrate efficient kernels, minimize latency * Support quantization formats such as GGUF (Q4/Q8), GPTQ/AWQ, int8/fp16 * Validate accuracy against reference backends (perplexity, task benchmarks) and drive improvements What Success Looks Like Within your first 6-12 months, you'll: * Bring up a new LLM/VLM family end to end on the GPNPU backend, with accuracy matching the reference * Deliver measurable tokens/s or latency gains on a frontier model * Ship one serving feature (e.g. paged KV cache) in a production release