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# Embedded Software Engineer

- **Company:** ORBIT NEURO CO.
- **Location:** San Francisco, CA, United States
- **Experience:** Expert
- **Contract:** Permanent contract
- **Skills:** Application Integration Architecture, Automation of Tests, UClibc (C Standard Library), C++ (Programming Language), CMake, Computer Engineering, System Configuration, Software Debugging, Linux, Programming Tools, Device Drivers, Linux on Embedded Systems, Embedded Software, Field-Programmable Gate Array (FPGA), FreeRTOS, Protocol Buffers, Hardware Interface Design, Hardware-In-The-Loop Simulation, Joint Test Action (IEEE Standards), Linux Kernel, Message Queuing Telemetry Transport (MQTT), Real-Time Operating Systems, Signal Processing, System on a Chip, SystemVerilog, Verilog, VHSIC Hardware Description Language (VHDL), ZeroMQ (Concurrent Programming Libraries), Concurrency, Yocto, Information Technology, U-Boot, Grpc
- **Published:** November 11, 2026
- **Apply:** https://startup.jobs/senior-embedded-software-engineer-orbit-neuro-co-10727564

## About the Role

* An engineer with a degree in computer science, electrical engineering, computer engineering, or a related field, and at least five years of relevant professional experience.
 * Experienced in modern C++ for embedded systems, including resource management, concurrency, and debugging.
 * Comfortable developing on embedded Linux, with practical experience using Yocto.
 * Familiar with networked services or messaging protocols such as gRPC, MQTT, DDS, or ZeroMQ, and approaches to moving structured data between systems.
 * Comfortable reasoning across software and hardware boundaries and using measurements to explore design choices.
 * Someone who enjoys sharing discoveries, discussing tradeoffs, and learning alongside engineers from other disciplines.

You might also

 * Have experience with Verilog, SystemVerilog, or VHDL and FPGA-based acquisition.
 * Know ARM-based systems, AMD/Xilinx Zynq platforms, or AMD's Embedded Development Framework (EDF), with experience in board support packages (BSPs), device trees, or U-Boot.
 * Have worked on timing, clock synchronization, digital signal processing (DSP), or high-throughput data acquisition (DAQ), or bring related real-time operating system (RTOS) experience with FreeRTOS or Zephyr.
 * Have developed Linux kernel device drivers or worked with DMA, SPI, I2C, or other hardware interfaces.
 * Bring experience with scientific instruments, optical sensing, robotics, or other precision measurement systems.
 * Have used CMake, GoogleTest, Catch2, or hardware-in-the-loop (HIL) testing to build confidence in embedded software.
 * Bring additional embedded Linux experience with Buildroot, OpenEmbedded, cross-compilation, or debugging with GDB and JTAG.

We're looking for a strong foundation and the ability to grow. You don't need experience with every technology we use, and the "You might also" section is entirely optional. If the core work feels like a good match but some details are new to you, we'd like to hear from you. Prior neuroscience or brain-computer interface experience isn't expected.

## Description

Help turn a sophisticated optical sensing system into a high-performance wearable for understanding the brain. You'll shape how our wearable acquires, processes, and delivers neural measurements, working closely with hardware and signal-processing engineers.

Our platform combines C++23, embedded Linux built with the Yocto Project, and modern sensing hardware, with gRPC and Protocol Buffers (Protobuf) connecting acquisition software to the wider system. We tackle deep design challenges in timing, concurrency, memory, and throughput. The embedded firmware you design will directly empower individuals with insights into their own brain., * Develop the C++ software that controls acquisition, configures peripherals, runs self-tests, and manages recording sessions.

 * Design and optimize the path from raw sensor frames through on-device signal processing to a timestamped network stream.
 * Evolve our Yocto-based Linux platform, including application integration, system configuration, and reproducible builds.
 * Solve timing, concurrency, memory, and throughput challenges across a high-performance wearable.
 * Collaborate with hardware and FPGA engineers to bring new sensing capabilities to life.
 * Build automated tests, performance measurements, and development tools that make the acquisition system reliable and scalable.