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# FPGA Engineer / Senior FPGA Engineer

- **Company:** Rise Technical Recruitment Ltd
- **Location:** Didcot, United Kingdom
- **Experience:** Expert
- **Salary:** £41,414 - £58,679
- **Contract:** Temporary contract
- **Skills:** Adobe Flash, C++ (Programming Language), Software Debugging, Linux, Ethernet, Firmware, Field-Programmable Gate Array (FPGA), Hardware Description Language, Python (Programming Language), LTspice, MATLAB, Verilog, VHSIC Hardware Description Language (VHDL), Vivado, Digital Access Carrier System, PIC Microcontroller, Fpga Hardware, State Machines, Pspice, Hardware Testing, Software Version Control
- **Published:** November 13, 2026
- **Apply:** https://www.cv-library.co.uk/job/225829723/fpga-engineer-senior-fpga-engineer

## About the Role

* Strong FPGA/HDL firmware experience (VHDL or Verilog), ideally with Xilinx devices and Vivado
 * Experience with simulation/verification/validation tools and disciplined version control practices
 * Degree in Engineering/Science (or equivalent experience) plus a foundation in electronics and lab test/measurement

FPGA, Xilinx, DAC, ADC, Python, C++, HDL, PSpice, LTspice, QSpice, MATLAB, LINUX, WIN, Oxford, Didcot, Swindon, Reading, Wantage, Witney, High Wycombe

## Description

FPGA Engineer / Senior FPGA Engineer

£41,414 - £58,679 + Cutting-Edge FPGA Development + Major National Upgrade Project + Hybrid Working + Defined Benefit Pension

Harwell, Oxfordshire (Commutable from: Didcot, Oxford, Abingdon, Wantage, Wallingford, Newbury, Swindon, Reading)

Are you an FPGA Engineer looking for a technically challenging role where you can take real ownership of complex firmware development on a world-class facility upgrade project?

On offer is an opportunity to join a highly respected, not-for-profit scientific organisation, developing FPGA firmware for the next generation of magnet power supplies as part of a major upgrade programme, with a hybrid working arrangement (minimum 4 days onsite).

You will be working on advanced Xilinx FPGA designs in Vivado, delivering full-cycle HDL development for feedback control, filtering, and interlock handling using state machines, alongside simulation, verification, and on-hardware validation using logic analysers.

You'll collaborate closely with hardware engineers and a controls team to optimise performance and develop reliable Ethernet-based control interfaces, while improving and documenting code in line with strict engineering standards and version control practices.

This role would suit an FPGA Engineer with strong HDL experience (VHDL/Verilog), looking to deepen their technical expertise through high-impact project work in a quality-focused engineering environment.

The Role:

 * Develop, maintain and debug HDL firmware for Xilinx FPGAs using Vivado for magnet power supply controllers
 * Implement feedback control, filtering and interlock handling using state machines
 * Design and integrate interfaces to ADCs, DACs, SRAM/Flash, sensors and microcontrollers
 * Verify designs via simulation test benches and complete on-hardware validation using logic analysers
 * Hybrid working with a minimum of 4 days onsite, 40 hours per week (3-year fixed term contract)