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# Staff NAND ECC and Media Architecture Engineer

- **Company:** Micron Technology, Inc.
- **Location:** San Jose, CA, United States
- **Experience:** Expert
- **Salary:** $173,000 - $295,000
- **Contract:** Permanent contract
- **Skills:** Artificial Intelligence, Computer Engineering, Firmware, Flash Memory, Information Theory, Machine Learning, Non-Volatile Memory, Data Processing, Application Specific Integrated Circuits, Agentic-AI, Low Latency, Claude
- **Published:** November 13, 2026
- **Apply:** https://www.indeed.com/viewjob?jk=754f9588409c931a

## About the Role

* 5+ years of strong background in error-correcting codes or communications/information theory.
 * MS or PhD in Electrical Engineering, Computer Engineering, or related field.
 * Extensive experience translating algorithms into implementable hardware or firmware architectures.
 * Strong analytical and multi-functional interpersonal skills.

Preferred Qualifications:

 * Experience in NAND Flash or other non-volatile memory technologies.
 * Familiarity with SSD/controller architecture and firmware.
 * Good understanding of Claude or Agentic AI or willingness to learn and help develop efficient workflow.

## Description

We are seeking a Staff Engineer to develop next-generation NAND error correction and decoding technologies, including LDPC/BCH, hard/soft decoding, and channel/LLR estimation. The role will develop and evaluate algorithms and architectures optimized for reliability, latency, throughput, power, and area, while employing AI/ML and AI-assisted engineering to accelerate innovation, optimization, and development of new ECC and error-recovery solutions. The engineer will work across NAND, ASIC, firmware, and system teams., * Develop ECC strategies and integration solutions, evaluating the impact of BCH, LDPC, and other solutions on area, latency, power consumption, and error correction capabilities.

 * Analyze NAND channel characteristics. Develop and evaluate advanced error-handling techniques.
 * Evaluate ECC impact on system-level metrics.
 * Explore next-generation ECC/data-processing architectures for future NAND and AI/storage products.