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# Technical Program Manager

- **Company:** The Unconventional
- **Location:** Mountain View, CA, United States
- **Experience:** Expert
- **Contract:** Permanent contract
- **Skills:** Artificial Intelligence, Swing (Java), Rapid Prototyping Process, Cadence Virtuoso, Software Engineering, System Software, Systems Integration, Information Technology, Machine Learning Operations
- **Published:** November 13, 2026
- **Apply:** https://www.careerbuilder.com/job-details/technical-program-manager-mountain-view-ca--0dd02555-d1d3-44eb-9c34-c5bebbf64e1f

## About the Role

* 10+ years technical program management in silicon, systems, or ML infrastructure
 * Strong written and verbal communication across highly technical teams
 * BS/MS in Computer Science, Electrical Engineering, or related field
 * Experience with hardware-software codesign programs-AI accelerators, novel compute architectures, or research silicon

Preferred qualifications

 * Understanding of chip development lifecycle: architecture, RTL, tapeout, bring-up, validation
 * Familiarity with compiler/runtime development and system software integration
 * Fluency with agentic tools and AI-assisted workflows to scale program management without scaling headcount or meetings
 * Comfort with ambiguity-you can build structure without imposing process that slows teams down
 * Technical depth to engage credibly with chip architects, compiler engineers, and ML researchers
 * Track record shipping in fast-moving environments: startups, research labs, or skunkworks programs

## Description

We're looking for a Technical Program Manager to own hardware-software co-development across our test chip program. You'll be the connective tissue between silicon, architecture, systems, and software teams-driving rapid prototyping cycles that let us validate new AI architectures quickly and learn fast.

This role leads to owning program execution for our first product.

Responsibilities

Drive test chip programs from architecture exploration through tapeout, bring-up, and characterization. You'll manage aggressive 4-month tapeout cycles, coordinating across silicon, hardware architecture, and systems teams.

Own hardware-software co-development schedules and dependencies. Our architecture is novel, which means software, compilers, and system integration are deeply intertwined with silicon decisions. You'll keep these workstreams synchronized.

Build and maintain the program infrastructure for rapid iteration-tracking experiments, capturing learnings, managing risk, and making tradeoffs visible so the team can move fast without losing coherence.

Work across AI theory, system modeling, and silicon teams to translate research directions into executable program plans. You'll need to understand what we're trying to learn from each test chip and structure the program around those goals.

Prepare the organization for product execution. As we move from prototyping toward our first product, you'll help evolve our program discipline from research velocity to production readiness.