> Markdown version of [/jobs/ext/4706986-engineer-ii-asic-fpga-active-secret-onsite](https://www.wearedevelopers.com/jobs/ext/4706986-engineer-ii-asic-fpga-active-secret-onsite). Every page supports `.md` or `Accept: text/markdown`. Links point to the HTML versions so they work for humans too. Agent guide: [/agents.md](https://www.wearedevelopers.com/agents.md).

---

# Engineer II ASIC/FPGA - Active Secret (Onsite)

- **Company:** RTX
- **Location:** Cedar Rapids, IA, United States
- **Salary:** $68,900 - $131,100
- **Contract:** Permanent contract
- **Skills:** Software Debugging, Digital Electronics, Field-Programmable Gate Array (FPGA), MATLAB, Signal Processing, Simulink, Subversion, SystemVerilog, Verilog, VHSIC Hardware Description Language (VHDL), Vivado, Application Specific Integrated Circuits, ModelSim, Git, Software Version Control
- **Published:** November 13, 2026
- **Apply:** https://globalhr.wd5.myworkdayjobs.com/REC_RTX_Ext_Gateway/job/US-IA-CEDAR-RAPIDS-108--400-Collins-Rd-NE--BLDG-108/Engineer-II-ASIC-FPGA---Active-Secret--Onsite-_01888966

## About the Role

Active and transferable U.S. government issued security clearance is required prior to start date. U.S. citizenship is required, as only U.S. citizens are eligible for a security clearance, * Typically requires a degree in Science, Technology, Engineering or Mathematics (STEM) and minimum 2 years of prior relevant experience or an Advanced Degree in a related field

 * Active and transferable U.S. government issued security clearance is required prior to start date
 * U.S. citizenship is required, as only U.S. citizens are eligible for a security clearance
 * RTL coding and simulation in VHDL, Verilog, or SystemVerilog
 * Experience with debugging and root cause investigations on hardware using hardware schematics, integrated FPGA vendor debug tools, and digital lab equipment, * Experience using ASIC and/or FPGA design tools (e.g. Modelsim, Quartus, Vivado or other FPGA-specific tools)
 * Digital circuit architecture and resource tradeoffs
 * Some background in signal processing and/or information assurance
 * Familiarity with the signal processing system simulation & analysis tools (e.g. Matlab, Simulink)
 * Familiarity with revision control concepts and tools (e.g. Git, Subversion)
 * Ability to work with minimal supervision, team with engineers of a variety of skills and backgrounds, and matrix into projects with aggressive schedules and frequent milestones
 * Strong oral and written communication skills with the ability to document and present one's work and status

## Description

* You will work with an experienced team to learn best practices and Collins' engineering processes for implementing world class ASIC / FPGA solutions.
 * You will get to work with cutting edge technologies developed both in house and by external vendors.
 * You will learn how ASICs and FPGAs are used to implement solutions utilized in communications, security, and space-based products.