> Markdown version of [/jobs/ext/4707824-lead-software-engineer](https://www.wearedevelopers.com/jobs/ext/4707824-lead-software-engineer). Every page supports `.md` or `Accept: text/markdown`. Links point to the HTML versions so they work for humans too. Agent guide: [/agents.md](https://www.wearedevelopers.com/agents.md). --- # Lead Software Engineer - **Company:** PDS Inc. - **Location:** Phoenix, AZ, United States - **Experience:** Expert - **Salary:** $291,200 - **Contract:** Permanent contract - **Skills:** Computer Engineering, Information Technology, Performance Monitor - **Published:** November 13, 2026 - **Apply:** https://www.cjhunter.com//jobsearch/showjob.html?resultid=0mjjFY&offset=170&PageSize=ALL&PageTitle=%3Cspan+style%3D%27font-weight%3Abold%27%3ELead+Software+Engineer+-+%3C%2Fspan%3ELead+SoC+Performance+Engineer+%7C+Intel+Architecture+%26amp%3B+QoS+PDS+Tech+Commercial+is+hiring+a+Lead+SoC+Performance+Engineer+to+drive+performance+characterization+and+optimization+ac..&SIDW=ebfafb737833b3bac41aa8bec11a23a3.VUlEPTYwMjI2NTk1 ## About the Role * 8+ years of SoC performance analysis and characterization experience. * Strong expertise in L2/L3 Cache, LLC occupancy, cache contention, and memory bandwidth. * Hands-on experience with Intel PMU, Uncore Performance Counters, and performance-monitoring tools. * Knowledge of QoS, Cache Allocation Technology (CAT), Memory Bandwidth Allocation (MBA), and bandwidth throttling. * Experience with Intel Tiger Lake, Ice Lake, or Alder Lake platforms. * Background developing performance-monitoring tools and analyzing multicore and NoC behavior. * Bachelor's degree in Computer Science, Computer Engineering, Electrical Engineering, or related field. AC20-193 certification experience is strongly preferred. ## Description * Lead development of performance-monitoring tools and characterization frameworks. * Analyze cache utilization, memory traffic, NoC congestion, and interconnect performance. * Develop and validate QoS policies, bandwidth allocation, and resource management strategies. * Identify performance bottlenecks and establish latency and bandwidth limits. * Lead technical initiatives and collaborate with architecture and engineering teams.