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Agent guide: [/agents.md](https://www.wearedevelopers.com/agents.md). --- # Senior Staff Hardware Engineer - **Company:** SanDisk - **Location:** Milpitas, CA, United States (Remote available) - **Experience:** Expert - **Salary:** $172,800 - $293,800 - **Contract:** Permanent contract - **Skills:** Artificial Intelligence, Bioinformatics, Computer Engineering, Data Centers, Software Debugging, Logic Synthesis of Circuits, Firmware, Hardware Design, Interoperability, PCI Express, Performance Tuning, Release Management, Signal Integrity, Systems Architecture, Application Specific Integrated Circuits, Physical Design - **Published:** November 14, 2026 - **Apply:** https://dejobs.org/x/x/BF4E9791FFC548E199043507DC854DB5/job/ ## About the Role * BS or MS in Electrical Engineering, Computer Engineering, or related field. * 12+ years of hardware development experience. * Proven experience leading complex hardware products from concept through production. * Strong expertise in: * High-speed digital design * PCB architecture and design review * Signal integrity and power integrity * Power architecture and power delivery * System bring-up and debug * Validation and qualification * Hardware integration and root-cause analysis * Experience working across ASIC, firmware, package, validation, and manufacturing organizations. * Strong communication, leadership, and collaboration skills. Preferred: * Experience with advanced packaging technologies. * Experience with chiplet-based systems and heterogeneous integration. * Experience with UCIe, PCIe, or other die-to-die and high-speed interconnect technologies. * Experience supporting UCIe interoperability, validation, characterization, and debug. * Experience working with customers, suppliers, OSATs, and manufacturing partners. * Experience with data center, AI/accelerator, memory, or high-performance compute architectures and ecosystems. * Familiarity with evolving memory architectures, system interfaces, and industry standards. ## Description Architecture & Technical Leadership * Lead hardware development from architecture and requirements through design, integration, qualification, and production release. * Partner with system architecture, system design, and ASIC teams to shape product architecture and translate system concepts into practical hardware solutions. * Serve as the HW technical decision owner, driving key architecture, design, and implementation decisions throughout development. * Evaluate technical tradeoffs across performance, power, electrical design, implementation risk, cost, and schedule. Hardware Design & Development Leadership * Lead the architecture and development of complex high-speed PCBAs, including electrical architecture, interfaces, power delivery, SI/PI, schematic development, and PCB implementation. * Lead development of engineering test vehicles, adapters, characterization platforms, and other hardware required to develop and qualify next-generation memory solutions. * Drive integration across silicon, package, memory, power, and board-level interfaces, working closely with domain experts across the organization. * Provide hands-on design leadership and technical problem solving. High-Speed Interface and Connectivity * Lead implementation of high-speed interfaces including PCIe, UCIe, DDR, and related technologies. * Support UCIe interoperability, validation, debug, characterization, and performance optimization activities. * Define hardware requirements supporting die-to-die communication, telemetry, and debug. Power, Signal Integrity, and Physical Design * Define board-level power architecture and support package-level power delivery requirements. * Drive signal integrity, power integrity, clocking, reset architecture, and power sequencing implementation. * Coordinate thermal and mechanical requirements throughout the product lifecycle. Integration, Bring-Up, FA & Product Execution * Lead hardware integration through bring-up, validation, qualification, and production release, ensuring designs provide the test, characterization, debug, and observability capabilities required for successful development. * Work across ASIC, firmware, validation, SI/PI, package, and other engineering teams to resolve complex hardware and system-level issues. * Drive technical execution, risk closure, and cross-functional alignment while balancing product performance, quality, schedule, and business objectives., Sandisk is committed to providing equal opportunities to all applicants and employees and will not discriminate based on their race, color, ancestry, religion (including religious dress and grooming standards), sex (including pregnancy, childbirth or related medical conditions, breastfeeding or related medical conditions), gender (including a person's gender identity, gender expression, and gender-related appearance and behavior, whether or not stereotypically associated with the person's assigned sex at birth), age, national origin, sexual orientation, medical condition, marital status (including domestic partnership status), physical disability, mental disability, medical condition, genetic information, protected medical and family care leave, Civil Air Patrol status, military and veteran status, or other legally protected characteristics. We also prohibit harassment of any individual on any of the characteristics listed above. Our non-discrimination policy applies to all aspects of employment. We comply with the laws and regulations set forth in the Equal Employment Opportunity is the Law (https://www.eeoc.gov/sites/default/files/2023-06/22-088_EEOC_KnowYourRights6.12.pdf) poster. Sandisk thrives on the power and potential of diversity. As a global company, we believe the most effective way to embrace the diversity of our customers and communities is to mirror it from within. We believe the fusion of various perspectives results in the best outcomes for our employees, our company, our customers, and the world around us. We are committed to an inclusive environment where every individual can thrive through a sense of belonging, respect and contribution.