> Markdown version of [/jobs/ext/491799-principal-signal-integrity-hardware-systems-engineer-pcie-gen](https://www.wearedevelopers.com/jobs/ext/491799-principal-signal-integrity-hardware-systems-engineer-pcie-gen). Every page supports `.md` or `Accept: text/markdown`. Links point to the HTML versions so they work for humans too. Agent guide: [/agents.md](https://www.wearedevelopers.com/agents.md). --- # Principal Signal Integrity & Hardware Systems Engineer (PCIe Gen - **Company:** Everforth CyberCoders - **Location:** Santa Clara, CA, United States - **Experience:** Expert - **Salary:** $150,000.0 - $250,000.0 - **Contract:** Permanent contract - **Skills:** Data Analysis, Systems Engineering, Software Debugging, Digital Electronics, Logic Synthesis of Circuits, Digital Technology, Firmware, Python (Programming Language), MATLAB, PCI Express, Signal Integrity, Scripting, Hfss, Software Troubleshooting, Modeling and Simulation, Ansys - **Published:** June 7, 2026 - **Apply:** https://www.indeed.com/viewjob?jk=26bd6db4eb9e85c3 ## About the Role Do you have experience in Thermal analysis?, Do you have a Master's degree?, Requirements: Signal Integrity, PCIe (Gen5/6), High-Speed SerDes, PCB Design, Power Integrity (PI) Analysis, Sigrity / Ansys HFSS, Reference Board Design, EM Modeling & Simulation, * Bachelors or Masters degree in Electrical Engineering or related field; PhD preferred but not required. * 5+ years of hands-on experience in signal integrity, hardware systems, and high-speed digital design with demonstrated leadership on complex products. * Proven experience designing and validating PCIe Gen5 and/or Gen6 links and related SerDes interfaces (protocol compliance and link margining). * Strong PCB and reference board design background, including stackup definition, controlled impedance routing, and connector/cable integration. * Proficiency with SI/PI and EM tools such as Cadence Sigrity, SiSoft, Ansys HFSS, Keysight ADS, or similar simulation suites. * Expertise in IBIS-AMI modeling, channel simulation, BER/eye analysis, and jitter decomposition techniques. * Experience with power integrity analysis and decoupling strategies for high-speed digital systems. * Hands-on lab experience with high-speed test equipment (oscilloscopes, VNAs, TDRs, BERTs) and troubleshooting methodologies. * Experience with EM/package modeling, signal/power co-simulation, and thermal/EM-aware system trade-offs. * Strong scripting and data-analysis skills (Python, MATLAB, or similar) to automate simulations and post-process results. * Excellent communication and cross-functional collaboration skills; experience mentoring engineers and defining engineering processes. * Ability to manage multiple projects, prioritize technical risks, and deliver to schedule in a fast-paced environment. ## Description We are seeking an experienced Principal Signal Integrity & Hardware Systems Engineer to lead design and verification of high-performance digital hardware with a focus on PCIe Gen5/Gen6 and 25Gbps+ SerDes interfaces. The role combines advanced signal and power integrity analysis, reference board and PCB design guidance, EM/field simulation, and hands-on lab validation to ensure robust system-level performance. You will drive architecture decisions, mentor engineers, and collaborate across cross-functional teams to deliver scalable, manufacturable solutions for next-generation products., * Lead signal integrity (SI) and hardware systems engineering efforts for PCIe Gen5/Gen6 and other high-speed SerDes interfaces, driving architecture choices, budgeting, and tradeoffs. * Own reference board and PCB design best practices: define stackups, routing topologies, connector/cable interfaces, and layout constraints for high-speed channels. * Perform detailed SI and PI analysis using tools such as Cadence Sigrity, SIsoft, Ansys HFSS, and other EM solvers to model channel loss, crosstalk, reflections, and package effects. * Develop and run channel and link-level simulations (IBIS-AMI, eye, BER, jitter/power-aware analyses) to validate compliance with PCIe and other protocol margins. * Lead power integrity (PI) analysis and decoupling strategies to minimize supply noise impact on SerDes and system timing. * Create EM models of packages, connectors, and PCBs, and use them to inform design changes to improve signal fidelity and EMC performance. * Plan and execute lab validation: setup and run TDR/TDT, VNA, high-speed oscilloscope, BERT, and related measurements for debug and release verification. * Collaborate closely with board layout teams, package engineers, firmware, system architects, and manufacturing to resolve signal and hardware issues from pre-silicon through production. * Mentor and coach other engineers, establish SI/PI processes and checklists, and drive knowledge sharing across the organization. * Support supplier and partner engagements, including reviewing third-party PCB stackups, evaluating test fixtures, and providing technical direction for prototypes and NPI runs. ## Related Videos - [More efficient software for more efficient microchips](https://www.wearedevelopers.com/videos/1164-more-efficient-software-for-more-efficient-microchips) - [Leveraging Large Language Models for Legacy Code Translation: Challenges and Solutions](https://www.wearedevelopers.com/videos/1157-leveraging-large-language-models-for-legacy-code-translation-challenges-and-solutions) - [Cloud Vendor Lock-In - Is it just a new version of the Database Abstraction Layers?](https://www.wearedevelopers.com/videos/1185-cloud-vendor-lock-in-is-it-just-a-new-version-of-the-database-abstraction-layers) - [Building a hypercar from scratch](https://www.wearedevelopers.com/videos/607-building-a-hypercar-from-scratch) - [The Billion Dollar Machine: First Time Right.](https://www.wearedevelopers.com/videos/393-the-billion-dollar-machine-first-time-right) - [Colorful quantum randomness](https://www.wearedevelopers.com/videos/100257-colorful-quantum-randomness) ## Related Articles - [Fullstack developer salary in Germany [2023]](https://www.wearedevelopers.com/magazine/197-fullstack-developer-salary-in-germany-2023) - [Software Engineer Career: Things You Should Know](https://www.wearedevelopers.com/magazine/143-software-engineer-career-things-you-should-know) - [Highest Paying Tech Companies in Europe](https://www.wearedevelopers.com/magazine/162-highest-paying-tech-companies-in-europe) - [Frontend Developer Salary in Germany [2023]](https://www.wearedevelopers.com/magazine/195-frontend-developer-salary-in-germany-2023) - [Software Developer Salary in Switzerland [2023]](https://www.wearedevelopers.com/magazine/215-software-developer-salary-in-switzerland-2023) - [Software Developer Salary in Germany [2023]](https://www.wearedevelopers.com/magazine/194-software-developer-salary-in-germany-2023)