> Markdown version of [/jobs/ext/534947-senior-staff-design-engineer](https://www.wearedevelopers.com/jobs/ext/534947-senior-staff-design-engineer). Every page supports `.md` or `Accept: text/markdown`. Links point to the HTML versions so they work for humans too. Agent guide: [/agents.md](https://www.wearedevelopers.com/agents.md).

---

# Senior/Staff Design Engineer

- **Company:** Globalfoundries U.S. Inc.
- **Location:** Austin, TX, United States
- **Experience:** Expert
- **Salary:** $69,000.0 - $202,000.0
- **Contract:** Permanent contract
- **Skills:** Artificial Intelligence, Microarchitecture, Software Debugging, Logic Synthesis of Circuits, Microprocessors, Perl (Programming Language), Python (Programming Language), Reduced Instruction Set Computing, SystemVerilog, Verilog, VHSIC Hardware Description Language (VHDL), Multithreading, Scripting, Physical Design
- **Published:** June 11, 2026
- **Apply:** https://www.indeed.com/viewjob?jk=167aa254f9b89473

## About the Role

Do you have experience in Simulation tools?, Do you have a Master's degree?, Knowledge of the pipeline stages of an in-order or out-of-order high-performance CPU core
Knowledge of microprocessor architecture, including one or more of the following areas:

 * Instruction fetch and decode, branch prediction techniques
 * Instruction scheduling, register renaming, Reorder Buffer (ROB)
 * Out-of-order execution
 * Integer and Floating-point execution
 * Load/Store execution
 * Instruction and Data Prefetch
 * Vector data path
 * Cache and memory subsystems

Knowledge of System Verilog, Verilog and/or VHDL
Experience with simulators and waveform debugging tools.
Knowledge of logic design principles along with timing and power implications
Bachelor's with 3-7 or Master's with 2-5 years of experience, Experience with designing RISC-V, ARM, and/or MIPS CPU
Experience with Hardware multi-threading, virtualization, and SIMD designs
Experience with vector and matrix-enabled CPUs, preferably RISC-V processors.
Understanding of high-performance techniques and trade-offs in a CPU microarchitecture
Understanding of low-power microarchitecture techniques
Experience using a scripting language such as Perl or Python
Knowledge of Cache coherency and memory consistency
Understanding of CPU integration at SoC level
Understanding of Safety and Security microarchitecture

## Description

We are seeking recent-graduates who are eager to become a world-class CPU IP Design Engineer. Responsible for developing and owning RTL development of our latest AI-enabled RISC-V CPU core. The candidate will be responsible for all aspects of the design including Functional Features, Performance, Power, and Area.

Essential Responsibilities:
Drive the micro-architecture and design of critical blocks of the CPU core
Design of RISC-V Vector CPU core and its custom extensions
Design of AI-enabled Matrix engine to augment the Vector CPU
Explore high-performance strategies working with the CPU modeling team
Perform Microarchitecture development and specification- from early high-level architectural exploration, through microarchitectural research and arrive at detailed specifications
Configure Design Features Development, assessment, and refinement of RTL design to target power, performance, area, and timing goals
Perform Functional verification support and assist in the design verification strategy
Assist with the verification of RTL design performance goals
Partner with a multi-functional engineering team to implement and validate physical design aspects of timing, area, reliability, testability, and power

Other Responsibilities:
Perform all activities in a safe and responsible manner and support all Environmental, Health, Safety & Security requirements and programs.


## Related Videos

- [JavaScript? No. Java Scripts! - Scripting with Java](https://www.wearedevelopers.com/videos/2094-javascript-no-java-scripts-scripting-with-java)
- [More efficient software for more efficient microchips](https://www.wearedevelopers.com/videos/1164-more-efficient-software-for-more-efficient-microchips)
- [Intermediate Bitcoin Script](https://www.wearedevelopers.com/videos/25-intermediate-bitcoin-script)
- [Strange New Worlds: shaping the future of the digital age](https://www.wearedevelopers.com/videos/677-strange-new-worlds-shaping-the-future-of-the-digital-age)
- [The Billion Dollar Machine: First Time Right.](https://www.wearedevelopers.com/videos/393-the-billion-dollar-machine-first-time-right)
- [Oops! Stories of supply chain shenanigans](https://www.wearedevelopers.com/videos/245-oops-stories-of-supply-chain-shenanigans)

## Related Articles

- [Is Software Engineering Over-Saturated?](https://www.wearedevelopers.com/magazine/418-is-software-engineering-over-saturated)
- [Dev Digest 120 - Apple and peers](https://www.wearedevelopers.com/magazine/455-dev-digest-120-apple-and-peers)
- [What’s the Difference between a Junior, Mid, and Senior Developer?](https://www.wearedevelopers.com/magazine/238-what-s-the-difference-between-a-junior-mid-and-senior-developer)
- [Dev Digest 121 - AI goes offline](https://www.wearedevelopers.com/magazine/456-dev-digest-121-ai-goes-offline)
- [Where to Find Entry-Level Software Engineering Jobs](https://www.wearedevelopers.com/magazine/397-where-to-find-entry-level-software-engineering-jobs)
- [Why Upskilling And Reskilling is Important For Developers](https://www.wearedevelopers.com/magazine/428-why-upskilling-and-reskilling-is-important-for-developers)