> Markdown version of [/jobs/ext/544923-senior-digital-asic-design-engineer](https://www.wearedevelopers.com/jobs/ext/544923-senior-digital-asic-design-engineer). Every page supports `.md` or `Accept: text/markdown`. Links point to the HTML versions so they work for humans too. Agent guide: [/agents.md](https://www.wearedevelopers.com/agents.md). --- # Senior Digital ASIC Design Engineer - **Company:** Draper Labs - **Location:** Cambridge, MA, United States - **Experience:** Expert - **Salary:** $82,300.0 - $220,000.0 - **Contract:** Permanent contract - **Skills:** Computer Engineering, Digital Technology, Systems Architecture, SystemVerilog, Trusted Systems, Verilog, VHSIC Hardware Description Language (VHDL), Application Specific Integrated Circuits - **Published:** June 4, 2026 - **Apply:** https://jobs.localjobnetwork.com/job/detail/85910014/Senior-Digital-ASIC-Design-Engineer ## About the Role * Proficiency in integrated circuit design * Understanding of integrated circuits, semiconductors, and general computer architecture * Ability to write detailed design specifications * Ability to lead multi-disciplinary technical teams * Excellent verbal and written communication skills * Excellent mathematical skills * Excellent organizational skills and attention to detail * Excellent time management skills with the proven ability to meet deadlines * Strong analytical and problem-solving skills * Ability to prioritize tasks * Demonstrate strong organization, planning, and time management skills to achieve program goals Education Requires a bachelor's degree in Engineering, or related field. Masters degree preferred. Experience Requires 7-10 years of experience with a bachelor's degree, or 5-10 years of experience with a master's degree in ASIC Hardware Engineering or related., * Experience with low power circuit design * Experience with CMOS advanced nodes below 32nm * Experience with radiation-hardened electronics, * Applicants should possess solid skills in front-end digital systems design with experience in design flows from Cadence or Synopsys. * Be fluent in System Verilog, Verilog or VHDL and familiar with LINT, simulation and synthesis. * Familiarity with architectures for secure systems design, e.g., cryptographic encoders / decoders or tagged processor architectures is a plus. * Demonstrated experience with successful tape-outs at advanced nodes is desired. Experience leading and managing design teams is also desired. Active US secret clearance is required. ## Description Draper Laboratory is seeking talented and motivated individuals to tackle challenging engineering problems in advanced digital IC design. As a Senior Digital ASIC Designer, you will be responsible for designing high-performance digital ASICs in advanced technologies. You will be responsible for implementing designs from RTL through synthesis. You will work in multi-disciplinary teams with opportunities to learn, grow and contribute to a variety of projects in different application areas., * Design and simulate circuits at transistor-level to implement architecture and requirement specifications * Contribute to system-level design * Optimize hardware designs for performance, power, and cost * Evaluate the hardware feasibility of complex algorithms and requirements * Independently contribute to complex chip architectures and designs * Independently drive solutions to complex problems - develop requirements, propose ways forward when customer requirements are unclear or incomplete, and adapt appropriately to changes in requirements * Contribute to business development and proposal activities * Develop, document, and teach best practices to less experienced engineers * Perform or guide physical layout, including floor-planning, and simulate circuits using extracted parasitics, contribute to design-for-test development. * Perform other duties as assigned ## Related Videos - [Security Challenges of Breaking A Monolith](https://www.wearedevelopers.com/videos/362-security-challenges-of-breaking-a-monolith) - [The Billion Dollar Machine: First Time Right.](https://www.wearedevelopers.com/videos/393-the-billion-dollar-machine-first-time-right) - [Real-world Threat Modeling](https://www.wearedevelopers.com/videos/936-real-world-threat-modeling) - [Strange New Worlds: shaping the future of the digital age](https://www.wearedevelopers.com/videos/677-strange-new-worlds-shaping-the-future-of-the-digital-age) - [More efficient software for more efficient microchips](https://www.wearedevelopers.com/videos/1164-more-efficient-software-for-more-efficient-microchips) - [THE HUMAN OPERATING SYSTEM: Why Organizational Adaptability Will Be the Real Competitive Advantage o](https://www.wearedevelopers.com/videos/100241-the-human-operating-system-why-organizational-adaptability-will-be-the-real-competitive-advantage-o) ## Related Articles - [Where To Find Software Engineering Jobs](https://www.wearedevelopers.com/magazine/396-where-to-find-software-engineering-jobs) - [Why Attend a Developer Event in 2026?](https://www.wearedevelopers.com/magazine/688-why-attend-a-developer-event-in-2026) - [Is Software Engineering Over-Saturated?](https://www.wearedevelopers.com/magazine/418-is-software-engineering-over-saturated) - [Where to Find Entry-Level Software Engineering Jobs](https://www.wearedevelopers.com/magazine/397-where-to-find-entry-level-software-engineering-jobs) - [Dev Digest 121 - AI goes offline](https://www.wearedevelopers.com/magazine/456-dev-digest-121-ai-goes-offline) - [Résumé-Driven Development: How IT trends affect the job market for software developers](https://www.wearedevelopers.com/magazine/59-resume-driven-development-how-it-trends-affect-the-job-market-for-software-developers)