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# Senior FPGA Engineer

- **Company:** International Family Entertainment, Inc.
- **Location:** Los Angeles, CA, United States
- **Experience:** Expert
- **Salary:** $160,000.0 - $250,000.0
- **Contract:** Permanent contract
- **Skills:** Board Bringup, 3D Printing, Computing Platforms, C++ (Programming Language), Computer Engineering, Linux on Embedded Systems, Embedded Software, Field-Programmable Gate Array (FPGA), Integrated Development Environments, System on a Chip, SystemVerilog, VHSIC Hardware Description Language (VHDL), Vivado, Fpga Hardware, Information Technology, Low Latency, Feature Extraction, Programming Languages
- **Published:** June 12, 2026
- **Apply:** https://www.indeed.com/viewjob?jk=013af65b276ff344

## About the Role

Do you have experience in Vivado?, Do you have a Master's degree?, 3D printing experience is not required to be successful here - rather we look for smart, motivated, collaborative engineers who love solving hard problems and creating amazing technology!, * Bachelor's degree in computer engineering, electrical engineering, computer science, or related field

 * 8+ years of FPGA development experience in SystemVerilog or VHDL
 * Familiarity with Xilinx Vivado/Vitis toolchain development environment
 * Experience with high-speed IO, board bring up, and similar hardware-centric FPGA development domains

Nice to Have:

 * Master's degree in computer engineering, electrical engineering, computer science, or related field
 * Experience with image processing or DSP
 * Experience with Xilinx Zynq Ultrascale+ MPSoC
 * Experience with embedded software development including embedded Linux and System on Chip (SoC)-based architectures
 * Experience implementing math/advanced computations on FPGAs
 * Experience with heterogeneous computing platforms and high-speed data acquisition systems
 * Familiarity with C/C++ or other high-level programming languages
 * Excellent verbal and written communication skills
 * Creative thinker able to apply first-principles reasoning to solve complex problems

## Description

* Design, implement, and optimize subsystems within a massively parallel, ultra-low latency FPGA pipeline processing hundreds of thousands of frames per second across a fleet of hundreds of FPGAs
 * Collaborate closely with software, electrical, and process engineering teams to build and advance FPGA capabilities at the system level
 * Build and optimize real-time ML inference pipelines directly on FPGA fabric, one of the most demanding and least-explored frontiers in reconfigurable computing
 * Develop RTL components and IP blocks with rigorous attention to timing closure, resource utilization, and deterministic latency
 * Implement high-performance signal processing algorithms on FPGA, including custom arithmetic, filtering, and feature extraction at line rate
 * Implement deterministic, nanosecond-precision controllers for high-power laser systems operating under strict real-time constraints


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