> Markdown version of [/jobs/ext/624200-dmts-systems-architect](https://www.wearedevelopers.com/jobs/ext/624200-dmts-systems-architect). Every page supports `.md` or `Accept: text/markdown`. Links point to the HTML versions so they work for humans too. Agent guide: [/agents.md](https://www.wearedevelopers.com/agents.md). --- # DMTS, Systems Architect - **Company:** Micron Technology, Inc. - **Location:** Boise, ID, United States - **Salary:** $208,000.0 - **Contract:** Permanent contract - **Skills:** Computing Platforms, Computer Engineering, Dynamic Random-Access Memory, Signal Integrity, Information Technology - **Published:** June 12, 2026 - **Apply:** https://dejobs.org/x/x/026790E6E27D499DACEE2D14AA5A160E/job/ ## About the Role * Bachelor's degree or higher in Electrical Engineering, Computer Engineering, Computer Science, or a related field. * Extensive professional experience working with DRAM architecture, memory systems, or advanced semiconductor builds. * Demonstrated experience translating system or customer requirements into architectural or silicon-level solutions. * Experience collaborating across multiple technical domains (e.g., silicon, packaging, systems, or platforms). Preferred Qualifications: * Advanced degree (MS or PhD or equivalent experience) in a relevant engineering or computer science field. * Experience defining or influencing RAS, reliability, or telemetry features in production or pre-production designs. * Experience engaging directly with customers, ecosystem partners, or industry standards organizations (such as JEDEC). * Demonstrated technical leadership across multiple projects or product generations. * Familiarity with system-level trade-offs related to performance, power, signal integrity, thermals, or cost. ## Description Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. The DRAM Architecture team is responsible for defining the system-level and silicon-level architectures that enable Micron's memory products. The team works across technology generations and product lines, collaborating with design, product, systems, and ecosystem partners to deliver scalable, reliable, and high-performance memory solutions aligned with customer and market needs. This role provides senior-level architectural leadership to help shape Micron's next-generation DRAM products. As a Distinguished Member of Technical Staff, you will influence memory architecture decisions across semiconductor chips, assembly methods, component units, and system interfaces, contributing to both near-term product execution and long-term technology direction. Responsibilities: * Define and evolve DRAM system architectures that address performance, capacity scaling, reliability (RAS), and observability requirements. * Collaborate across functions to evaluate architectural trade-offs spanning DRAM silicon, packaging, modules, boards, and system platforms. * Influence host memory controller and platform architecture through technical engagement with CPU, GPU, and SoC partners. * Contribute to RAS and telemetry feature definition, translating system-level needs into implementable architectural concepts. * Support exploration of emerging memory technologies and assess their impact on future product roadmaps. * Engage with customers, product teams, and business partners to communicate architectural direction and support informed design decisions. * Serve as a technical mentor and steward, supporting architectural consistency and collaboration across teams. ## Related Videos - [Angular Signals: what's all the fuss about?](https://www.wearedevelopers.com/videos/684-angular-signals-what-s-all-the-fuss-about) - [Modern Web Development with Nuxt3](https://www.wearedevelopers.com/videos/294-modern-web-development-with-nuxt3) - [Swapping a Data Warehouse at Runtime: Zero-Downtime Migration Without Changing a Single Client](https://www.wearedevelopers.com/videos/100311-swapping-a-data-warehouse-at-runtime-zero-downtime-migration-without-changing-a-single-client) - [The Billion Dollar Machine: First Time Right.](https://www.wearedevelopers.com/videos/393-the-billion-dollar-machine-first-time-right) - [Robust AIGC Provenance with Invisible Watermarking](https://www.wearedevelopers.com/videos/100222-robust-aigc-provenance-with-invisible-watermarking) - [Strange New Worlds: shaping the future of the digital age](https://www.wearedevelopers.com/videos/677-strange-new-worlds-shaping-the-future-of-the-digital-age) ## Related Articles - [Résumé-Driven Development: How IT trends affect the job market for software developers](https://www.wearedevelopers.com/magazine/59-resume-driven-development-how-it-trends-affect-the-job-market-for-software-developers) - [From developer to manager – what does it take to become an engineering manager?](https://www.wearedevelopers.com/magazine/42-from-developer-to-manager-what-does-it-take-to-become-an-engineering-manager) - [Why developer experience matters](https://www.wearedevelopers.com/magazine/514-why-developer-experience-matters) - [Dev Digest 212: WebMCP or MCP, What is DevRel, AI's 10% Productivity Boost, and a 49MB Web Page…](https://www.wearedevelopers.com/magazine/717-dev-digest-212-webmcp-or-mcp-what-is-devrel-ai-s-10-productivity-boost-and-a-49mb-web-page) - [Everything a Developer Needs to Know About MCP with Neo4j](https://www.wearedevelopers.com/magazine/604-everything-a-developer-needs-to-know-about-mcp-with-neo4j) - [Should Tech Managers Be Developers First? Pros and Cons](https://www.wearedevelopers.com/magazine/327-should-tech-managers-be-developers-first-pros-and-cons)