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# GPIO Integration Engineer - Onsite

- **Company:** VIVA USA Inc
- **Location:** Austin, TX, United States
- **Contract:** Permanent contract
- **Skills:** Artificial Intelligence, Computer Engineering, Logic Synthesis of Circuits, Signal Integrity, Physical Verification, Physical Design
- **Published:** June 12, 2026
- **Apply:** https://www.dice.com/job-detail/72e83b0e-7903-4343-b146-eeb8642002a9

## About the Role

digital, analog GPIO,
electrical analyses, power integrity, signal integrity,
streamline GPIO integration,
Circuit, logic design engineering,
ESD, SPICE, power noise generation, signal integrity, AI tool,
clock distribution, clock specifications, jitter, DCD,
robust integration, physical design, physical verification, You have strong circuit/electrical/ESD background. You are a team player who has excellent communication skills and experience collaborating with other engineers. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems., Circuit and logic design engineering experience
ESD knowledge and experience
Experience with SPICE
Understanding power noise generation and sensitivity
Understanding of the basics of signal integrity, specifically termination impedance, characteristic impedance, transmission lines
Experience using AI tool(s) in engineering practice.
Knowledge of clock distribution and clock specifications like jitter, DCD, etc. a plus.

ACADEMIC CREDENTIALS:
Bachelors or Masters degree in Electrical or Computer Engineering

## Description

The client 3rd Party IP Team needs a person very familiar with all aspects of general purpose I/O (GPIO) and capable of supporting integration of various kinds of these IP into all client products. The candidate would ensure correct and robust integration and electrical analysis of GPIO, working with chip-level physical design teams and power/signal integrity teams., Provide guidance and review of a wide array of digital and analog GPIO implementations based on 3rd party IP licensed by the client.
Perform and support electrical analyses for power and signal integrity to ensure that GPIOs operate successfully across many client SoC environments.
Review and sign off on physical verification checks for GPIO.
Develop AI-assisted methodology to help streamline GPIO integration efforts across many implementations and many SoC.


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