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# ASIC/FPGA Verification Engineer IV

- **Company:** Lockheed Martin
- **Location:** Highlands Ranch, CO, United States (Remote available)
- **Experience:** Expert
- **Salary:** $123,500.0 - $217,695.0
- **Contract:** Permanent contract
- **Skills:** JIRA, Linux, Formal Verification, Field-Programmable Gate Array (FPGA), Hardware Description Language, Python (Programming Language), Microsoft Project, Oracle Virtual Machine, SystemVerilog, Verilog, VHSIC Hardware Description Language (VHDL), Scripting, Application Specific Integrated Circuits, SC Clearance
- **Published:** May 30, 2026
- **Apply:** https://www.lockheedmartinjobs.com/job/denver/asic-fpga-verification-engineer-iv/694/95726733408

## About the Role

* UVM expertise
 * SystemVerilog and VHDL mastery
 * You need to be an independently minded and well organized engineer, comfortable in laboratory digital environments, and able to respond and interact with a dynamic fast-moving team.
 * 5+ years professional FPGA verification experience.
 * While no clearance is needed to start in this position, you will need to obtain and maintain a DoD Secret clearance, thus US Citizenship is required., * Bachelor of Science or higher from an accredited college in Electrical Engineering or related discipline, or equivalent experience/combined education.

 * Experience in the verification of FPGA and/or ASIC devices.

 * Experience with modern verification methodologies such as UVM, OVM or VMM.

 * HDL programming experience with VHDL, Verilog, and/or SystemVerilog.
Desired Skills:

 * Knowledge of space-grade/qualified FPGAs
 * Experience or knowledge of MS Project, JIRA.
 * Knowledge of Python or other scripting languages
 * Experience designing with AMD Versal, Microchip RTG4 FPGAs.
 * Lab testing experience
Security Clearance Statement: This position requires a government security clearance, you must be a US Citizen for consideration., Ability to Work Remotely: Onsite Full-time: The work associated with this position will be performed onsite at a designated Lockheed Martin facility.

## Description

* Perform all aspects of ASIC and FPGA verification through the lifecycle from initial requirements capture through architecture, design, analysis, simulations and test in a Linux-based high-performance computing environment.
 * Devise a unique verification plan for a given design.
 * Use SystemVerilog and Universal Verification Methodology (UVM) to verify a design in a Linux-based high-performance computing environment.
 * Document verification plan and results.
 * Support technical reviews and present to internal and external stakeholders.
 * Interface with an independent verification team who will be working in parallel, verifying the design.
 * Work with an independent verification team to resolve bugs found in the design.


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