> Markdown version of [/jobs/ext/735828-fpga-devops-engineer](https://www.wearedevelopers.com/jobs/ext/735828-fpga-devops-engineer). Every page supports `.md` or `Accept: text/markdown`. Links point to the HTML versions so they work for humans too. Agent guide: [/agents.md](https://www.wearedevelopers.com/agents.md). --- # FPGA DevOps Engineer - **Company:** Arkham Technology Limited - **Location:** Layton, UT, United States - **Salary:** $90,000.0 - $160,000.0 - **Contract:** Permanent contract - **Skills:** Build Automation, Automation of Tests, Microsoft Azure, Bash Shell, CMake, Static Program Analysis, Code Coverage, Software Quality, CompTIA Security+, Computer Engineering, Continuous Integration, DevOps, Dynamic Program Analysis, Firmware, Field-Programmable Gate Array (FPGA), Github, Hardware Description Language, Python (Programming Language), Linux System Administration, Software Maintenance, System on a Chip, SystemVerilog, Tcl (Programming Language), Toolchain, Verilog, VHSIC Hardware Description Language (VHDL), YAML, Vivado, Scripting, Fpga Hardware, Delivery Pipeline, Git, SC Clearance, Build Management, Containerization, Gitlab-ci, Information Technology, Build Tools, Hardware Infrastructure, Software Version Control, Docker, Jenkins - **Published:** June 29, 2026 - **Apply:** https://www.indeed.com/viewjob?jk=1e6994440553e1d0 ## About the Role Do you have experience in Version control systems?, Do you have a Master's degree?, FPGA DevOps Engineer Must be U.S. citizen due to U.S. Government contract requirements. Must be eligible to obtain and maintain a DoD Secret clearance. Active clearance preferred., * Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field. * Program and automate workflows. * Strong scripting skills in Python and Tcl for automation of FPGA workflows. * Experience designing CI/CD pipelines using Azure DevOps Server and Git-based source control repositories. * Experience utilizing Docker for containerized application development and deployment. * Familiarity with software quality practices, including static code analysis, dynamic analysis, and automated quality gates within the development pipeline. * Proficient with Git and collaborative version control practices. * Experience building and maintaining software build systems and toolchains. * Proficiency with build automation tools such as CMake, GCC, or Similiar development/build environments. * Experience with static code analysis tools such as Coverity, CodeSonar, or similar tools. * Experience integrating code coverage metrics and quality gates into CI/CD pipelines. * Ability to design, maintain, and monitor automated build and analysis pipelines to ensure software quality standards are met. * Solid understanding of FPGA development flow and related deliverables: IP packaging, synthesis, timing closure, and bitstream export. * Familiarity with Linux environments and Bash scripting., * Programmable Logic (PL) background exposure to Xilinx Vivado, ability to partner with PL teams on build / test automation for bitstreams. * CompTIA Security+ * Operating in controlled / tiered engineering environments: Familiarity with CI/CD across restricted networks and one-way transfer patterns., * This position requires the ability to obtain and maintain a U.S. Government security clearance. Are you a U.S. citizen? (Yes/No) Ability to Commute: * Layton, UT 84040 (Preferred) ## Description * Operate and maintain AMD Vivado and Vitis toolchains for FPGA/SoC development (Zynq, Versal). * Automate synthesis, implementation, IP integration, bitstream generation, and platform export using Tcl and Python. * Design, implement, and maintain DevOps pipelines using tools such as GitLab CI, Jenkins, or GitHub Actions, with workflows described in YAML. * Integrate HDL/RTL codebases (Verilog/VHDL/SystemVerilog) into version-controlled, testable, and deployable pipelines. * Develop robust scripting and automation solutions for toolchain orchestration, artifact packaging, and deployment. * Support and extend build/test infrastructure for both firmware and hardware components across heterogeneous targets. * Maintain consistent and reproducible environments using containers (Docker) or virtualization technologies. * Collaborate with software, hardware, and QA teams to ensure seamless handoff and traceability of artifacts across development stages. ## Related Videos - [CI/CD with Github Actions](https://www.wearedevelopers.com/videos/856-ci-cd-with-github-actions) - [Code to Road in < 12 hours](https://www.wearedevelopers.com/videos/1082-code-to-road-in-12-hours) - [How a Small Team Shrank a Microsoft Monorepo by 94%](https://www.wearedevelopers.com/videos/1236-how-a-small-team-shrank-a-microsoft-monorepo-by-94) - [More efficient software for more efficient microchips](https://www.wearedevelopers.com/videos/1164-more-efficient-software-for-more-efficient-microchips) - [Docker Compose: Rediscovered](https://www.wearedevelopers.com/videos/1978-docker-compose-rediscovered) - [Git for Code Reviews](https://www.wearedevelopers.com/videos/429-git-for-code-reviews) ## Related Articles - [Dev Digest 121 - AI goes offline](https://www.wearedevelopers.com/magazine/456-dev-digest-121-ai-goes-offline) - [Should senior developers refuse interview coding challenges?](https://www.wearedevelopers.com/magazine/29-should-senior-developers-refuse-interview-coding-challenges) - [Fully Remote Software Engineer Jobs](https://www.wearedevelopers.com/magazine/447-fully-remote-software-engineer-jobs) - [Highest Paying Tech Companies for Developers](https://www.wearedevelopers.com/magazine/220-highest-paying-tech-companies-for-developers) - [DevOps Engineer Salary [2023]](https://www.wearedevelopers.com/magazine/203-devops-engineer-salary-2023) - [Is Software Engineering Over-Saturated?](https://www.wearedevelopers.com/magazine/418-is-software-engineering-over-saturated)